代码搜索:Vector

找到约 10,000 项符合「Vector」的源代码

代码结果 10,000
www.eeworm.com/read/288669/8614750

vhd dzxs.vhd

LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.std_logic_unsigned.all; entity dzxs is port(clk:in std_logic; hang:out std_logic_vector(15 downto 0); lei:out std_logic_vector(3 d
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vhd nandflash.vhd

---------------------------------------------------------------------------------------------- -- -- VHDL file generated by X-HDL - Revision 3.2.52 Mar. 28, 2005 -- Tue Nov 25 16:36:54 2008 --
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m main_gp_algorithm.m

% G-P 算法求关联维(输入时间序列数据) % 使用平台 - Matlab6.5 / Matlab7.0 % 作者:陆振波,海军工程大学 % 欢迎同行来信交流与合作,更多文章与程序下载请访问我的个人主页 % 电子邮件:luzhenbo@yahoo.com.cn % 个人主页:http://luzhenbo.88uu.com.cn clc clear close all %----------
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vhd altera_vhdl_support.vhd

-- ---------------------------------------------------------------------------- -- -- These routines are used to help SOPC Builder generate VHDL code. -- -- -----------------------------------
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vhd output.vhd

library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Uncomment the following lines to use the declarations that are -- provided for instantia
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vhd decoder7.vhd

LIBRARY IEEE; USE IEEE.std_logic_1164.ALL; ENTITY decoder7 IS PORT( bcd : IN STD_LOGIC_VECTOR(3 downto 0); --二—进制输入 dout : OUT STD_LOGIC_vector(6 downto 0)); --译码输出 END decoder7; A
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vhd decoder7.vhd

LIBRARY IEEE; USE IEEE.std_logic_1164.ALL; ENTITY decoder7 IS PORT( bcd : IN STD_LOGIC_VECTOR(3 downto 0); --二—进制输入 dout : OUT STD_LOGIC_vector(6 downto 0)); --译码输出 END decoder7; A
www.eeworm.com/read/378829/9215471

m xfft_model.m

% function [y, exp_out] = XFFT_model(x,N,INVERSE) % % calculates the complex block-floating point
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h multiclass_ecoc.h

// -*- C++ -*- #ifndef __LEMGA_MULTICLASS_ECOC_H__ #define __LEMGA_MULTICLASS_ECOC_H__ /** @file * @brief Declare @link lemga::MultiClass_ECOC MultiClass_ECOC@endlink * (Multiclass classification
www.eeworm.com/read/179827/9335603

txt 双口ram已调程序.txt

说明:在使用此程序时注意不要在最前最后一个数据地址单元存放数据地址,否则可能丢失。 使用时只需要将数据地址分别放入数据地址单元便可。 此模块为验证模块,DAZ,SJ:分别存放地址数据。 hhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh LIBRARY IEEE;主模块负责把数据,地址发送到双口RAM; USE IEEE