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sn_ksyms.c
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 200
sn_ksyms.c
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 200
sn_ksyms.c
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 200
run_options.txt
#-- Synplicity, Inc.
#-- Version 9.0
#-- Project file C:\temp\xp2_demo\run_options.txt
#-- Written on Tue Jan 15 11:47:27 2008
#add_file options
add_file -vhdl -lib work "E:/ispTOOLS7_0/ispcp
readme.txt
readme - Standard Design
Overview:
This design is provided for all Nios development boards and highlights many of the standard features of the Nios II processor.
Contents of the System:
sn_ksyms.c
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 200
readme.txt
readme - Standard Design
Overview:
This design is provided for all Nios development boards and highlights many of the standard features of the Nios II processor.
Contents of the System:
coregen_lab.gfl
# VHDL : PDCL (jhdparse)
__projnav/pn_correlator_jhdparse_tcl.rsp
# VHDL : PDCL (jhdparse)
__projnav/read_ch_arbiter_jhdparse_tcl.rsp
# VHDL : PDCL (jhdparse)
__projnav/fifo_2048x8_jhdparse_tcl.r
counter.vhd
------------------------------------------------------------
-- VHDL Counter
-- 2006 3 30 11 6 2
-- Created By "DXP VHDL Generator"
-- "Copyright (c) 2002-2004 Altium Limited"
-------------------
rader_hilbert.quartus
FILES
{
BDF_FILE = rd_contr.bdf;
BDF_FILE = contrIQ.bdf;
VHDL_FILE = oesel.vhd;
BDF_FILE = indatamux.bdf;
VHDL_FILE = rh_lpm_dff0.vhd;
VHDL_FILE = subdiv2.vhd;
VHDL_FILE = adddiv2.vhd;