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VHDL 的代码
hcl_util.c
/* $Id$
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright
pcibr_slot.c
/*
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2
hcl_util.c
/* $Id$
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright
pcibr_slot.c
/*
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2
hcl_util.c
/* $Id$
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright
pcibr_slot.c
/*
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2
modelsim.ini
[Library]
others = $MODEL_TECH/../modelsim.ini
proasic3 = D:/Libero/Designer/lib/modelsim/precompiled/vlog/proasic3
syncad_vhdl_lib = D:\Libero\Designe
modelsim.ini.sav
[Library]
others = $MODEL_TECH/../modelsim.ini
proasic3 = D:/Libero/Designer/lib/modelsim/precompiled/vlog/proasic3
syncad_vhdl_lib = D:\Libero\Designer/
dianyabiao.map.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
prev_cmp_dianyabiao.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}