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# Copyright (C) 1991-2005 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any

#-- Synplicity, Inc. #-- Version 6.2.4 #-- Project file mc8051_core.prj #-- Written on Fri Aug 24 19:26:03 2001 #add_file options add_file -vhdl -lib work "../vhdl/mc8051_p.vhd" add_file -vhdl -lib

m255 cModel Technology dD:\nightly\patch\modeltech Pmath_complex DP work math_real @4BP1zW29?_

# Copyright (C) 1991-2006 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any outpu

#-- Synplicity, Inc. #-- Synplify version 5.3.1 #-- Project file D:\Projects\altera\lpcores\sdr\release\VHDL\V1_0\synthesis\synplicity\sdr_sdram.prj #-- Written on Tue Jun 06 11:39:39 2000 #devi

#-- Synplicity, Inc. #-- Version 6.0 #-- Project file D:\projects\altera\lpcores\ddr\release\VHDL\V1_0\synthesis\synplicity\ddr_sdram.prj #-- Written on Fri Jun 30 17:01:13 2000 #add_file opti

# Copyright (C) 1991-2005 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any outpu

V3 3 FL E:/vhdl/binarycounter/binarycouter.vhd 2006/10/07.16:19:13 I.27 EN work/BinaryCounter 1160209489 FL E:/vhdl/binarycounter/binarycouter.vhd \ PB ieee/std_logic_1164 1140839709 PB iee

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3} { "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info:

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3} { "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Runni