代码搜索:VHDL

找到约 10,000 项符合「VHDL」的源代码

代码结果 10,000
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dh structure.dh

DocumentHdrVersion "1.1" Header (DocumentHdr packageRefs [ ] properties [ (HdrProperty class "Ren_Vhdl" name "contains_entity" value "1" ) ] )
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dh structure.dh

DocumentHdrVersion "1.1" Header (DocumentHdr packageRefs [ ] properties [ (HdrProperty class "Ren_Vhdl" name "contains_entity" value "1" ) ] )
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dh structure.dh

DocumentHdrVersion "1.1" Header (DocumentHdr packageRefs [ ] properties [ (HdrProperty class "Ren_Vhdl" name "contains_entity" value "1" ) ] )
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tlg ddr_sdram.tlg

Synthesizing work.ddr_sdram.rtl @W:"d:\projects\altera\lpcores\ddr\release\vhdl\v1_0\source\ddr_sdram.vhd":131:14:131:16|Port direction mismatch between component and entity Synthesizing work.pll1.s
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qmsg compare.map.qmsg

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0} { "I
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log coregen.log

# Xilinx CORE Generator 6.2i # User = wukong Initializing default project... Loading plug-ins... All runtime messages will be recorded in E:\work\digital_sward\sub_DEMO\subseg\coregen.log # busfo
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cfg compxlib.cfg

#***************************************************************** # compxlib initialization file (compxlib.cfg) * #
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qmsg proj.fit.qmsg

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3} { "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartu
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rpt moore1.rpt

Project Information d:\vhdl_ex\moore1.rpt MAX+plus II Compiler Report File Version 10.2 07/10/2002 Compiled: 11/15/2003 12:42:00 Copyright (C) 1988-2002 Al
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rpt ex1.rpt

Project Information d:\vhdl_ex\ex1.rpt MAX+plus II Compiler Report File Version 10.2 07/10/2002 Compiled: 10/13/2003 11:54:01 Copyright (C) 1988-2002 Al