代码搜索:VHDL
找到约 10,000 项符合「VHDL」的源代码
代码结果 10,000
www.eeworm.com/read/246303/12738514
qmsg ledwater.map.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info:
www.eeworm.com/read/246300/12738862
qmsg serial.tan.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Runni
www.eeworm.com/read/246188/12752053
convert
VHDL: Converting a Hexadecimal Value to a Standard Logic Vector
This example shows how to convert a hexadecimal value to a std_logic_vector.
It is shown in both VHDL '87 (IEEE Std 1076-1987) and
www.eeworm.com/read/244041/12896419
vtd gal_300f.vtd
-- NOTE: Do not edit this file.
-- Auto generated by Post-Route VHDL Simulation Models
--
vcom c:/gal_300f/gal_300f.vhq
www.eeworm.com/read/329969/12922591
srp fifo_dc.srp
SCUBA, Version ispLever_v70_Prod_Build (55)
Wed Jun 18 17:17:15 2008
Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995 AT&T Corp. All rights reserved.
Copyright (c) 199
www.eeworm.com/read/329969/12922793
log fifo_dc_generate.log
Starting process:
SCUBA, Version ispLever_v70_Prod_Build (55)
Wed Jun 18 17:17:15 2008
Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995 AT&T Corp. All rights r
www.eeworm.com/read/329969/12922894
lpc fifo_dc.lpc
[Device]
Family=latticexp2
PartType=LFXP2-17E
PartName=LFXP2-17E-5Q208CES
SpeedGrade=-5
Package=PQFP208
OperatingCondition=COM
Status=P
[IP]
VendorName=Lattice Semiconductor Corporation
Co
www.eeworm.com/read/329969/12922974
log msg_file.log
SCUBA, Version ispLever_v70_Prod_Build (55)
Wed Jun 18 17:17:15 2008
Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995 AT&T Corp. All rights reserved.
Copyright
www.eeworm.com/read/142673/12931022
adf hw4.adf
[Project]
Current Flow=MultivendorHTML
VCS=0
version=1
Current Config=compile
[Configurations]
compile=hw4
[Settings]
LANGUAGE=VHDL
FLOW_TYPE=Schematic
FAMILY=FLEX10KA
SYNTH_TOOL=
www.eeworm.com/read/142672/12931041
adf hw3.adf
[Project]
Current Flow=MultivendorHTML
VCS=0
version=1
Current Config=compile
[Configurations]
compile=hw3
[Settings]
LANGUAGE=VHDL
FLOW_TYPE=Schematic
FAMILY=FLEX10KA
SYNTH_TOOL=