fifo_dc.lpc

PCM数据采集

[Device]
Family=latticexp2
PartType=LFXP2-17E
PartName=LFXP2-17E-5Q208CES
SpeedGrade=-5
Package=PQFP208
OperatingCondition=COM
Status=P

[IP]
VendorName=Lattice Semiconductor Corporation
CoreType=LPM
CoreStatus=Demo
CoreName=FIFO_DC
CoreRevision=4.3
ModuleName=FIFO_DC
SourceFormat=VHDL
ParameterFileVersion=1.0
Date=06/18/2008
Time=17:17:15

[Parameters]
Verilog=0
VHDL=1
EDIF=1
Destination=Synplicity
Expression=BusA(0 to 7)
Order=Big Endian [MSB:LSB]
IO=0
FIFOImp=EBR Based
Depth=512
Width=9
regout=0
CtrlByRdEn=0
EmpFlg=0
PeMode=Static - Single Threshold
PeAssert=10
PeDeassert=12
FullFlg=0
PfMode=Static - Single Threshold
PfAssert=256
PfDeassert=506
RDataCount=0
WDataCount=0
EnECC=0