代码搜索：VHDL
找到约 10,000 项符合「VHDL」的源代码
代码结果 10,000
www.eeworm.com/read/217282/14971152
prj delay_tbw_beh.prj
vhdl work "DELAY_VHD.vhd"
vhdl work "DELAY_tbw.vhw"
www.eeworm.com/read/217279/14971355
cpp xsimtestbench_arch.cpp
#include "isim/work/ccdout_tbw/testbench_arch.h"
static const char * HSimCopyRightNotice = "Copyright 2004-2005, Xilinx Inc. All rights reserved.";
#include "C:/Xilinx/vhdl/hdp/nt/ieee/std_logic_116
www.eeworm.com/read/214503/15098266
log coregen.log
# Xilinx CORE Generator 6.3i
# User = ChopinTries
Initializing default project...
Loading plug-ins...
All runtime messages will be recorded in F:\XilinxLab\myfirst\adder\coregen.log
# busformat=B
www.eeworm.com/read/214502/15098365
npl yx.npl
JDF G
// Created by Project Navigator ver 1.0
PROJECT yx
DESIGN yx
DEVFAM spartan2
DEVFAMTIME 0
DEVICE xc2s100
DEVICETIME 1137110316
DEVPKG tq144
DEVPKGTIME 1137110316
DEVSPEED -6
DEVSPEEDT
www.eeworm.com/read/213274/15138526
qmsg ior2.fit.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartu
www.eeworm.com/read/212430/15156282
tlg layer0.tlg
@N: CD630 :"E:\vtest\xilinx\vhdl8051\mc8051\mc8051_top_.vhd":74:7:74:16|Synthesizing work.mc8051_top.struc
@W: CD638 :"E:\vtest\xilinx\vhdl8051\mc8051\mc8051_top_.vhd":120:9:120:22|Signal s_ramx_dat
www.eeworm.com/read/212430/15156286
sro layer1.sro
# Created by Synplify Verilog HDL Compiler version 3.6t, Build 206R from Synplicity, Inc.
# Copyright 1994-2006 Synplicity, Inc. , All rights reserved.
# Synthesis Netlist written on Tue Apr 10 11:1
www.eeworm.com/read/212430/15156289
tlg layer1.tlg
@N: CG364 :"E:\vtest\xilinx\vhdl8051\mc8051\mc8051_rom.v":40:7:40:16|Synthesizing module mc8051_rom
@W: CG146 :"E:\vtest\xilinx\vhdl8051\mc8051\mc8051_rom.v":40:7:40:16|Creating black box for empty
www.eeworm.com/read/210234/15203132
npl pingche.npl
JDF G
// Created by Project Navigator ver 1.0
PROJECT pingche
DESIGN pingche
DEVFAM spartan2
DEVFAMTIME 0
DEVICE xc2s50
DEVICETIME 0
DEVPKG tq144
DEVPKGTIME 0
DEVSPEED -6
DEVSPEEDTIME 0
DE