layer1.sro

我在spartan-3e starter kit 的板上实现了mc8051

# Created by Synplify Verilog HDL Compiler version 3.6t, Build 206R from Synplicity, Inc.
# Copyright 1994-2006 Synplicity, Inc. , All rights reserved.
# Synthesis Netlist written on Tue Apr 10 11:17:59 2007
#
#
#OPTIONS:"|-mixedhdl|-modhint|_verilog_hintfile|-top|mc8051_ram|-top|mc8051_rom|-layerid|1|-primux|-fixsmult|-sdff_counter|-infer_seqShift|-nram|-divnmod|-I|E:\\vtest\\xilinx\\vhdl8051\\mc8051\\|-I|d:\\Synplicity\\fpga_862\\lib|-v2001|-devicelib|d:\\Synplicity\\fpga_862\\lib\\xilinx\\unisim.v|-autosm|-fid2|-sharing|on|-encrypt|-ui|-pro|-ram|-ll|2000"
#CUR:"d:\\Synplicity\\fpga_862\\bin\\c_ver.exe":1155035928
#CUR:"_verilog_hintfile":1176172872
#CUR:"d:\\Synplicity\\fpga_862\\lib\\xilinx\\unisim.v":1149824382
#CUR:"d:\\Synplicity\\fpga_862\\lib\\xilinx\\unisim.v":1149824382
#CUR:"d:\\Synplicity\\fpga_862\\bin\\..\\lib\\xilinx\\unisim.v":1149824382
#CUR:"d:\\Synplicity\\fpga_862\\bin\\..\\lib\\xilinx\\unisim.v":1149824382
#CUR:"E:\\vtest\\xilinx\\vhdl8051\\mc8051\\mc8051_rom.v":1176175016
#CUR:"E:\\vtest\\xilinx\\vhdl8051\\mc8051\\mc8051_rom.v":1176175016
#CUR:"E:\\vtest\\xilinx\\vhdl8051\\mc8051\\mc8051_ram.v":1175824592
#CUR:"E:\\vtest\\xilinx\\vhdl8051\\mc8051\\mc8051_ram.v":1175824592
f "d:\Synplicity\fpga_862\lib\xilinx\unisim.v"; # file 0
af .is_verilog 1;
f "d:\Synplicity\fpga_862\bin\..\lib\xilinx\unisim.v"; # file 1
af .is_verilog 1;
f "E:\vtest\xilinx\vhdl8051\mc8051\mc8051_rom.v"; # file 2
af .is_verilog 1;
f "E:\vtest\xilinx\vhdl8051\mc8051\mc8051_ram.v"; # file 3
af .is_verilog 1;
@E
@ 
ftell;
@E@MR@cd:j::(c4j:nFRIsl	RO6Uj4N_slCRPsFHDoN;
PCR3Gs0CMRND4N;
PHR3#sPCHoDFR
4;N3PRHP#_CDsHF4oR;P
NRs3FHNohl"CRljOU6s4_N;l"
@HR@cd:gc:4::cg4N(R8r8sn9:jR8N8s:rnj
9;N3HRs_0DFosHMCNlR8"N8;s"
@HR@6d:j::n6Uj:R	ODR	OD;H
NR03sDs_FHNoMl"CRO"D	;



@HR@6d:4c:4::6448nRH(Mr:Rj98rHM(9:j;H
NR03sDs_FHNoMl"CR8"HM;



@FR@6d:.6:4::6.48URFrk0(9:jRk8F0:r(j
9;N3HRs_0DFosHMCNlRF"8k;0"
@HR@6d:d::n6(d:RRCMC
M;N3HRs_0DFosHMCNlRM"C"
;

@HR@6d:c::n6(c:RRICI
C;N3HRs_0DFosHMCNlRC"I"b;
Rj@@:44::.4:Rk0sCsR0k0CRs;kC
@bR@4j::44::V.RNCD#RDVN#VCRNCD#;R
b@:@d64.:6.:6:R4UxFR8k(0r:Rj980Fkrj(:9@;
 ftell;
@E@MR@c.:j::(c4j:nFRIsl	RO6Uj4F_slCRPsFHDoN;
PCR3Gs0CMRND4N;
PHR3#sPCHoDFR
4;N3PRHP#_CDsHF4oR;P
NRs3FHNohl"CRljOU6s4_F;l"
@HR@c.:nc:4::cn4N(R8r8sg9:jR8N8s:rgj
9;N3HRs_0DFosHMCNlR8"N8;s"
@HR@c.:(::ncU(:R	ODR	OD;H
NR03sDs_FHNoMl"CRO"D	;



@FR@c.:U6:4::cU48URFrk0(9:jRk8F0:r(j
9;N3HRs_0DFosHMCNlRF"8k;0"
@bR@4j::44::0.RsRkC0CskRk0sCb;
Rj@@:44::.4:RDVN#VCRNCD#RDVN#
C;b@R@.U:c::46c4U:URRx80Fkrj(:9FR8k(0r:;j9