pingche.npl

简易数字频率计

JDF G
// Created by Project Navigator ver 1.0
PROJECT pingche
DESIGN pingche
DEVFAM spartan2
DEVFAMTIME 0
DEVICE xc2s50
DEVICETIME 0
DEVPKG tq144
DEVPKGTIME 0
DEVSPEED -6
DEVSPEEDTIME 0
DEVTOPLEVELMODULETYPE HDL
TOPLEVELMODULETYPETIME 0
DEVSYNTHESISTOOL XST (VHDL/Verilog)
SYNTHESISTOOLTIME 0
DEVSIMULATOR Modelsim
SIMULATORTIME 0
DEVGENERATEDSIMULATIONMODEL VHDL
GENERATEDSIMULATIONMODELTIME 0
SOURCE jsq1.vhdl
SOURCE jsq2.vhdl
SOURCE jsq3.vhdl
SOURCE jsq4.vhdl
SOURCE jsq5.vhdl
SOURCE jsq6.vhdl
SOURCE xzq.vhdl
SOURCE ymq.vhdl
SOURCE fpq2ms.vhdl
SOURCE scq.vhdl
SOURCE s_6.vhdl
SOURCE fpq1s.vhdl
SOURCE jsq.sch
SOURCE pingche.sch
SOURCE kz2.vhdl
STIMULUS jsq1_tw.tbw
SOURCE f5p.vhdl
DEPASSOC pingche yingjiao.ucf
[STATUS-ALL]
jsq.ngcFile=WARNINGS,1174005199
[STRATEGY-LIST]
Normal=True