代码搜索结果
找到约 10,000 项符合
VHDL 的代码
dds_vhdl.vwf
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to
dds_vhdl.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY DDS_VHDL IS -- 顶层设计
PORT ( CLK : IN STD_LOGIC;
FWORD : IN S
shifter_n.vhdl
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity shifter_n is
generic(
N :natural :=16
);
port(
shifter_1.vhdl
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity shifter_1 is
port(
iShtIn1 : in std_log
sin_vhdl.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
--Fonction sinus sous format VHDL
entity sin_vhdl is
generic(n:integer:=13);
Port (