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Sensor 的代码
train.v
// Example Verilog State machine to control trains File: Tcontrol.v
module train (reset, clock, sensor1, sensor2, sensor3, sensor4, sensor5,
switch1, switch2, switch3, dirA, dirB,CLOCK_50);
train.v
// Example Verilog State machine to control trains File: Tcontrol.v
module train (reset, clock, sensor1, sensor2, sensor3, sensor4, sensor5,
switch1, switch2, switch3, dirA, dirB,CLOCK_50);
self_deco.m
function [SINR,BER] = self_deco(soi_code, PSC, P, M, ind_sin, ind_in, delay_spread, L, sensors, snr_input, sir_input, theta, BS, DD, TrialAll,main_groupusr,minor_groupusr,fix_sir)
%additional varia
example3dappui.cpp
/*
============================================================================
* Name : Example3DAppUi.cpp
* Part of : Example3D
* Description : Definition of Example3DAppUi
*
port.h
/*------------------------------------------------------------------*-
Port.H (v1.00)
------------------------------------------------------------------
'Port Header' (see Chap 5) for
zc3xx.h
#ifndef ZC3XXUSB_H
#define ZC3XXUSB_H
/****************************************************************************
# Z-star zc301 zc302 P library #
# Copyright (C)
zc3xx.h
#ifndef ZC3XXUSB_H
#define ZC3XXUSB_H
/****************************************************************************
# Z-star zc301 zc302 P library #
# Copyright (C)
zc3xx.h
#ifndef ZC3XXUSB_H
#define ZC3XXUSB_H
/****************************************************************************
# Z-star zc301 zc302 P library #
# Copyright (C)
port.h
/*------------------------------------------------------------------*-
Port.H (v1.00)
------------------------------------------------------------------
'Port Header' (see Chap 5) for
lqgdemo3.m
function [ret,x0,str]=lqgdemo3(t,x,u,flag);
%LQGDEMO3 is the M-file description of the SIMULINK system named LQGDEMO3.
% The block-diagram can be displayed by typing: LQGDEMO3.
%
% SYS=LQGDEMO3(T,