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SCHEMATIC START ; // created by map version G.35 on Sat Feb 18 10:27:55 2006 COMP "clk" LOCATE = SITE "P88" LEVEL 1; COMP "speaker" LOCATE = SITE "P121" LEVEL 1; COMP "seg" LOCATE = SITE

//! ************************************************************************** // Written by: Map I.24 on Sun May 13 12:24:18 2007 //! ***************************************************************

# VHDL : Create Schematic Symbol __projnav/tb.rsp sel.spl __projnav/vhd2spl.err # VHDL : Create Schematic Symbol __projnav/tb.rsp lock.spl __projnav/vhd2spl.err # VHDL : Create Schematic Symbo

Protel Advanced Schematic Annotation Report for 'Sheet1.Sch' 00:04:44 18-May-2005 R? => R4 R? => R5 R? => R6 R? => R7 R?

Protel Advanced Schematic Annotation Report for 'Sheet1.Sch' 00:04:44 18-May-2005 R? => R4 R? => R5 R? => R6 R? => R7 R?

# XST (Creating Lso File) : lcd.lso # xst flow : RunXST lcd.syr lcd.prj lcd.sprj lcd.ana lcd.stx lcd.cmd_log lcd.ngc lcd.ngr # VHDL : Create Schematic Symbol __projnav/tb.rsp lcd.spl __

# Schematic : PDCL (jhdparse) __projnav/watch_jhdparse_tcl.rsp # Schematic : PDCL (jhdparse) __projnav/cnt60_jhdparse_tcl.rsp # Schematic : PDCL (jhdparse) __projnav/outs3_jhdparse_tcl.rsp # Sch

ftce_mxilinx_cnt60 NULL J:/projects/ISE/ISEexamples/wtut_sc/cnt60.vhf sub00/vhpl00 ftce_mxilinx_cnt60 schematic J:/projects/ISE/ISEexamples/wtut_sc/cnt60.vhf sub00/vhpl01 cb4ce_mxilinx_cnt60 NULL

# Schematic : View VHDL Functional Model stopwatch.vhf stopwatch.cmd_log # Schematic : View VHDL Functional Model cnt60.vhf cnt60.cmd_log # XAW : View VHDL Source DCM1.vhd # Schematic : View V

# Schematic : PDCL (jhdparse) # Schematic : PDCL (jhdparse) # Schematic : PDCL (jhdparse) # Schematic : PDCL (jhdparse) # Schematic : View Verilog Functional Model andnor2.vf # Schematic : View