qiangdaqi4ren.gfl

四人抢答器的实现

# VHDL : Create Schematic Symbol
__projnav/tb.rsp
sel.spl
__projnav/vhd2spl.err
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
lock.spl
__projnav/vhd2spl.err
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
ch41a.spl
__projnav/vhd2spl.err
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
djs.spl
__projnav/vhd2spl.err
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
ymq.spl
__projnav/vhd2spl.err
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
feng.spl
__projnav/vhd2spl.err
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
xzq3_1.spl
__projnav/vhd2spl.err
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
fpq2ms.spl
__projnav/vhd2spl.err
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
fpq1s.spl
__projnav/vhd2spl.err
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : View VHDL Functional Model
qiangdaqi.vhf
qiangdaqi.cmd_log
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : View VHDL Functional Model
qiangdaqi.vhf
qiangdaqi.cmd_log
# XST (Creating Lso File) : 
qiangdaqi.lso
# xst flow : RunXST
qiangdaqi.syr
qiangdaqi.prj
qiangdaqi.sprj
qiangdaqi.ana
qiangdaqi.stx
qiangdaqi.cmd_log
qiangdaqi.ngc
qiangdaqi.ngr
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
e:\vhdl\test_12jiao\qiangdaqi4ren/_ngo
qiangdaqi.ngd
qiangdaqi_ngdbuild.nav
qiangdaqi.bld
.untf
qiangdaqi.cmd_log
# Implementation : Map
qiangdaqi_map.ncd
qiangdaqi.ngm
qiangdaqi.pcf
qiangdaqi.nc1
qiangdaqi.mrp
qiangdaqi_map.mrp
qiangdaqi.mdf
__projnav/map.log
qiangdaqi.cmd_log
MAP_NO_GUIDE_FILE_CPF "qiangdaqi"
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
__projnav/posttrc.log
qiangdaqi.twr
qiangdaqi.twx
qiangdaqi.tsi
qiangdaqi.cmd_log
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
qiangdaqi.ncd
qiangdaqi.par
qiangdaqi.pad
qiangdaqi_pad.txt
qiangdaqi_pad.csv
qiangdaqi.pad_txt
qiangdaqi.dly
reportgen.log
qiangdaqi.xpi
qiangdaqi.grf
qiangdaqi.itr
qiangdaqi_last_par.ncd
__projnav/par.log
qiangdaqi.placed_ncd_tracker
qiangdaqi.routed_ncd_tracker
qiangdaqi.cmd_log
PAR_NO_GUIDE_FILE_CPF "qiangdaqi"
# Generate Programming File
__projnav/qiangdaqi_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
qiangdaqi.ut
# Generate Programming File
qiangdaqi.bgn
qiangdaqi.rbt
qiangdaqi.ll
qiangdaqi.msk
qiangdaqi.drc
qiangdaqi.nky
qiangdaqi.bit
qiangdaqi.bin
qiangdaqi.isc
qiangdaqi.cmd_log
# Configure Device (iMPACT)
qiangdaqi.prm
qiangdaqi.isc
qiangdaqi.svf
xilinx.sys
qiangdaqi.mcs
qiangdaqi.exo
qiangdaqi.hex
qiangdaqi.tek
qiangdaqi.dst
qiangdaqi.dst_compressed
qiangdaqi.mpm
_impact.cmd
_impact.log
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : View VHDL Functional Model
qiangdaqi.vhf
qiangdaqi.cmd_log
# XST (Creating Lso File) : 
qiangdaqi.lso
# xst flow : RunXST
qiangdaqi.syr
qiangdaqi.prj
qiangdaqi.sprj
qiangdaqi.ana
qiangdaqi.stx
qiangdaqi.cmd_log
qiangdaqi.ngc
qiangdaqi.ngr
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
e:\vhdl\wait316\qiangdaqi4ren/_ngo
qiangdaqi.ngd
qiangdaqi_ngdbuild.nav
qiangdaqi.bld
yingjiao.ucf.untf
qiangdaqi.cmd_log
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : View VHDL Functional Model
qiangdaqi.vhf
qiangdaqi.cmd_log
# XST (Creating Lso File) : 
qiangdaqi.lso
# xst flow : RunXST
qiangdaqi.syr
qiangdaqi.prj
qiangdaqi.sprj
qiangdaqi.ana
qiangdaqi.stx
qiangdaqi.cmd_log
qiangdaqi.ngc
qiangdaqi.ngr
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
e:\vhdl\wait316\qiangdaqi4ren/_ngo
qiangdaqi.ngd
qiangdaqi_ngdbuild.nav
qiangdaqi.bld
yingjiao.ucf.untf
qiangdaqi.cmd_log
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
e:\vhdl\wait316\qiangdaqi4ren/_ngo
qiangdaqi.ngd
qiangdaqi_ngdbuild.nav
qiangdaqi.bld
yingjiao.ucf.untf
qiangdaqi.cmd_log
# Implementation : Map
qiangdaqi_map.ncd
qiangdaqi.ngm
qiangdaqi.pcf
qiangdaqi.nc1
qiangdaqi.mrp
qiangdaqi_map.mrp
qiangdaqi.mdf
__projnav/map.log
qiangdaqi.cmd_log
MAP_NO_GUIDE_FILE_CPF "qiangdaqi"
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
__projnav/posttrc.log
qiangdaqi.twr
qiangdaqi.twx
qiangdaqi.tsi
qiangdaqi.cmd_log
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
qiangdaqi.ncd
qiangdaqi.par
qiangdaqi.pad
qiangdaqi_pad.txt
qiangdaqi_pad.csv
qiangdaqi.pad_txt
qiangdaqi.dly
reportgen.log
qiangdaqi.xpi
qiangdaqi.grf
qiangdaqi.itr
qiangdaqi_last_par.ncd
__projnav/par.log
qiangdaqi.placed_ncd_tracker
qiangdaqi.routed_ncd_tracker
qiangdaqi.cmd_log
PAR_NO_GUIDE_FILE_CPF "qiangdaqi"
# Generate Programming File
__projnav/qiangdaqi_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
qiangdaqi.ut
# Generate Programming File
qiangdaqi.bgn
qiangdaqi.rbt
qiangdaqi.ll
qiangdaqi.msk
qiangdaqi.drc
qiangdaqi.nky
qiangdaqi.bit
qiangdaqi.bin
qiangdaqi.isc
qiangdaqi.cmd_log
# Configure Device (iMPACT)
qiangdaqi.prm
qiangdaqi.isc
qiangdaqi.svf
xilinx.sys
qiangdaqi.mcs
qiangdaqi.exo
qiangdaqi.hex
qiangdaqi.tek
qiangdaqi.dst
qiangdaqi.dst_compressed
qiangdaqi.mpm
_impact.cmd
_impact.log
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
feng.spl
__projnav/vhd2spl.err
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
feng1.spl
__projnav/vhd2spl.err
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
d_chufaqi.spl
__projnav/vhd2spl.err
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : View VHDL Functional Model
qiangdaqi.vhf
qiangdaqi.cmd_log
# XST (Creating Lso File) : 
qiangdaqi.lso
# xst flow : RunXST
qiangdaqi.syr
qiangdaqi.prj
qiangdaqi.sprj
qiangdaqi.ana
qiangdaqi.stx
qiangdaqi.cmd_log
qiangdaqi.ngc
qiangdaqi.ngr
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
e:\qiangdaqi4ren/_ngo
qiangdaqi.ngd
qiangdaqi_ngdbuild.nav
qiangdaqi.bld
yingjiao.ucf.untf
qiangdaqi.cmd_log
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : View VHDL Functional Model
qiangdaqi.vhf
qiangdaqi.cmd_log
# XST (Creating Lso File) : 
qiangdaqi.lso
# xst flow : RunXST
qiangdaqi.syr
qiangdaqi.prj
qiangdaqi.sprj
qiangdaqi.ana
qiangdaqi.stx
qiangdaqi.cmd_log
qiangdaqi.ngc
qiangdaqi.ngr
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
e:\qiangdaqi4ren/_ngo
qiangdaqi.ngd
qiangdaqi_ngdbuild.nav
qiangdaqi.bld
yj2.ucf.untf
qiangdaqi.cmd_log
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : View VHDL Functional Model
qiangdaqi.vhf
qiangdaqi.cmd_log
# XST (Creating Lso File) : 
qiangdaqi.lso
# xst flow : RunXST
qiangdaqi.syr
qiangdaqi.prj
qiangdaqi.sprj
qiangdaqi.ana
qiangdaqi.stx
qiangdaqi.cmd_log
qiangdaqi.ngc
qiangdaqi.ngr
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
e:\qiangdaqi4ren/_ngo
qiangdaqi.ngd
qiangdaqi_ngdbuild.nav
qiangdaqi.bld
yj2.ucf.untf
qiangdaqi.cmd_log
# Schematic : PDCL (jhdparse)
__projnav/qiangdaqi_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qd_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qd_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qd_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qd_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qd_jhdparse_tcl.rsp
# Schematic : View VHDL Functional Model
qd.vhf
qd.cmd_log
# XST (Creating Lso File) : 
qd.lso
# xst flow : RunXST
qd.syr
qd.prj
qd.sprj
qd.ana
qd.stx
qd.cmd_log
qd.ngc
qd.ngr
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
e:\qiangdaqi4ren/_ngo
qd.ngd
qd_ngdbuild.nav
qd.bld
yj3.ucf.untf
qd.cmd_log
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
e:\qiangdaqi4ren/_ngo
qd.ngd
qd_ngdbuild.nav
qd.bld
yj3.ucf.untf
qd.cmd_log
# Implementation : Map
qd_map.ncd
qd.ngm
qd.pcf
qd.nc1
qd.mrp
qd_map.mrp
qd.mdf
__projnav/map.log
qd.cmd_log
MAP_NO_GUIDE_FILE_CPF "qd"
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
__projnav/posttrc.log
qd.twr
qd.twx
qd.tsi
qd.cmd_log
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
qd.ncd
qd.par
qd.pad
qd_pad.txt
qd_pad.csv
qd.pad_txt
qd.dly
reportgen.log
qd.xpi
qd.grf
qd.itr
qd_last_par.ncd
__projnav/par.log
qd.placed_ncd_tracker
qd.routed_ncd_tracker
qd.cmd_log
PAR_NO_GUIDE_FILE_CPF "qd"
# Generate Programming File
__projnav/qd_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
qd.ut
# Generate Programming File
qd.bgn
qd.rbt
qd.ll
qd.msk
qd.drc
qd.nky
qd.bit
qd.bin
qd.isc
qd.cmd_log
# Configure Device (iMPACT)
qd.prm
qd.isc
qd.svf
xilinx.sys
qd.mcs
qd.exo
qd.hex
qd.tek
qd.dst
qd.dst_compressed
qd.mpm
_impact.cmd
_impact.log
# xst flow : RunXST
qd.syr
qd.prj
qd.sprj
qd.ana
qd.stx
qd.cmd_log
qd.ngc
qd.ngr
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
e:\vhdl\waitpast\qiangdaqi4ren/_ngo
qd.ngd
qd_ngdbuild.nav
qd.bld
yj3.ucf.untf
qd.cmd_log
# Implementation : Map
qd_map.ncd
qd.ngm
qd.pcf
qd.nc1
qd.mrp
qd_map.mrp
qd.mdf
__projnav/map.log
qd.cmd_log
MAP_NO_GUIDE_FILE_CPF "qd"
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
__projnav/posttrc.log
qd.twr
qd.twx
qd.tsi
qd.cmd_log
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
qd.ncd
qd.par
qd.pad
qd_pad.txt
qd_pad.csv
qd.pad_txt
qd.dly
reportgen.log
qd.xpi
qd.grf
qd.itr
qd_last_par.ncd
__projnav/par.log
qd.placed_ncd_tracker
qd.routed_ncd_tracker
qd.cmd_log
PAR_NO_GUIDE_FILE_CPF "qd"
# Generate Programming File
__projnav/qd_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
qd.ut
# Generate Programming File
qd.bgn
qd.rbt
qd.ll
qd.msk
qd.drc
qd.nky
qd.bit
qd.bin
qd.isc
qd.cmd_log
# Configure Device (iMPACT)
qd.prm
qd.isc
qd.svf
xilinx.sys
qd.mcs
qd.exo
qd.hex
qd.tek
qd.dst
qd.dst_compressed
qd.mpm
_impact.cmd
_impact.log
# ProjNav -> New Source -> TBW
E:\VHDL\waitpast\qiangdaqi4ren\__projnav\hb_cmds
# Bencher Waveform : PDCL (jhdparse)
# Bencher Waveform : PDCL (jhdparse)
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
qd_tw.vhw
qd_tw.ano
qd_tw.tfw
# ModelSim : Simulate Behavioral VHDL Model
qd_tw.fdo
# ModelSim : Simulate Behavioral VHDL Model
vsim.wlf
# Bencher Waveform : PDCL (jhdparse)
# ModelSim : Simulate Behavioral VHDL Model
qd_tw.fdo
# ModelSim : Simulate Behavioral VHDL Model
vsim.wlf
# Bencher Waveform : PDCL (jhdparse)
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
feng1.spl
__projnav/vhd2spl.err
# ModelSim : Simulate Behavioral VHDL Model
qd_tw.fdo
# ModelSim : Simulate Behavioral VHDL Model
vsim.wlf
# ModelSim : Simulate Behavioral VHDL Model
vsim.wlf
# Bencher Waveform : PDCL (jhdparse)
# ProjNav -> New Source -> TBW
E:\VHDL\waitpast\qiangdaqi4ren\__projnav\hb_cmds
# Bencher Waveform : PDCL (jhdparse)
# Bencher Waveform : PDCL (jhdparse)
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
lock_tw.vhw
lock_tw.ano
lock_tw.tfw
# ModelSim : Simulate Behavioral VHDL Model
lock_tw.fdo
# ModelSim : Simulate Behavioral VHDL Model
vsim.wlf
# Bencher Waveform : PDCL (jhdparse)
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
lock.spl
__projnav/vhd2spl.err
# ModelSim : Simulate Behavioral VHDL Model
lock_tw.fdo
# ModelSim : Simulate Behavioral VHDL Model
vsim.wlf
# Schematic : PDCL (jhdparse)
__projnav/qd_jhdparse_tcl.rsp
# Bencher Waveform : PDCL (jhdparse)
# Schematic : View VHDL Functional Model
qd.vhf
qd.cmd_log
# XST (Creating Lso File) : 
qd.lso
# xst flow : RunXST
qd.syr
qd.prj
qd.sprj
qd.ana
qd.stx
qd.cmd_log
qd.ngc
qd.ngr
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
e:\vhdl\waitpast\qiangdaqi4ren/_ngo
qd.ngd
qd_ngdbuild.nav
qd.bld
yj3.ucf.untf
qd.cmd_log
# Schematic : PDCL (jhdparse)
__projnav/qd_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qd_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qd_jhdparse_tcl.rsp
# Schematic : View VHDL Functional Model
qd.vhf
qd.cmd_log
# XST (Creating Lso File) : 
qd.lso
# xst flow : RunXST
qd.syr
qd.prj
qd.sprj
qd.ana
qd.stx
qd.cmd_log
qd.ngc
qd.ngr
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
e:\vhdl\waitpast\qiangdaqi4ren/_ngo
qd.ngd
qd_ngdbuild.nav
qd.bld
yj3.ucf.untf
qd.cmd_log
# Implementation : Map
qd_map.ncd
qd.ngm
qd.pcf
qd.nc1
qd.mrp
qd_map.mrp
qd.mdf
__projnav/map.log
qd.cmd_log
MAP_NO_GUIDE_FILE_CPF "qd"
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
__projnav/posttrc.log
qd.twr
qd.twx
qd.tsi
qd.cmd_log
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
qd.ncd
qd.par
qd.pad
qd_pad.txt
qd_pad.csv
qd.pad_txt
qd.dly
reportgen.log
qd.xpi
qd.grf
qd.itr
qd_last_par.ncd
__projnav/par.log
qd.placed_ncd_tracker
qd.routed_ncd_tracker
qd.cmd_log
PAR_NO_GUIDE_FILE_CPF "qd"
# Generate Programming File
__projnav/qd_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
qd.ut
# Generate Programming File
qd.bgn
qd.rbt
qd.ll
qd.msk
qd.drc
qd.nky
qd.bit
qd.bin
qd.isc
qd.cmd_log
# Configure Device (iMPACT)
qd.prm
qd.isc
qd.svf
xilinx.sys
qd.mcs
qd.exo
qd.hex
qd.tek
qd.dst
qd.dst_compressed
qd.mpm
_impact.cmd
_impact.log
# ModelSim : Simulate Behavioral VHDL Model
qd_tw.fdo
# ModelSim : Simulate Behavioral VHDL Model
vsim.wlf
# Bencher Waveform : PDCL (jhdparse)
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
djs.spl
__projnav/vhd2spl.err
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
djs2.spl
__projnav/vhd2spl.err
# Schematic : PDCL (jhdparse)
__projnav/qd_jhdparse_tcl.rsp
# Schematic : PDCL (jhdparse)
__projnav/qd_jhdparse_tcl.rsp
# Schematic : View VHDL Functional Model
qd.vhf
qd.cmd_log
# XST (Creating Lso File) : 
qd.lso
# xst flow : RunXST
qd.syr
qd.prj
qd.sprj
qd.ana
qd.stx
qd.cmd_log
qd.ngc
qd.ngr
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
e:\vhdl\waitpast\qiangdaqi4ren/_ngo
qd.ngd
qd_ngdbuild.nav
qd.bld
yj3.ucf.untf
qd.cmd_log
# Implementation : Map
qd_map.ncd
qd.ngm
qd.pcf
qd.nc1
qd.mrp
qd_map.mrp
qd.mdf
__projnav/map.log
qd.cmd_log
MAP_NO_GUIDE_FILE_CPF "qd"
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
__projnav/posttrc.log
qd.twr
qd.twx
qd.tsi
qd.cmd_log
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
qd.ncd
qd.par
qd.pad
qd_pad.txt
qd_pad.csv
qd.pad_txt
qd.dly
reportgen.log
qd.xpi
qd.grf
qd.itr
qd_last_par.ncd
__projnav/par.log
qd.placed_ncd_tracker
qd.routed_ncd_tracker
qd.cmd_log
PAR_NO_GUIDE_FILE_CPF "qd"
# Generate Programming File
__projnav/qd_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
qd.ut
# Generate Programming File
qd.bgn
qd.rbt
qd.ll
qd.msk
qd.drc
qd.nky
qd.bit
qd.bin
qd.isc
qd.cmd_log
# Configure Device (iMPACT)
qd.prm
qd.isc
qd.svf
xilinx.sys
qd.mcs
qd.exo
qd.hex
qd.tek
qd.dst
qd.dst_compressed
qd.mpm
_impact.cmd
_impact.log
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
f01ms.spl
__projnav/vhd2spl.err
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
xzq.spl
__projnav/vhd2spl.err