代码搜索：SCI模块
找到约 10,000 项符合「SCI模块」的源代码
代码结果 10,000
www.eeworm.com/read/474412/6809012
dsn 点阵模块.dsn
www.eeworm.com/read/473173/6857213
obj 收银模块.obj
www.eeworm.com/read/473173/6857222
obj 报表模块.obj
www.eeworm.com/read/473173/6857231
cpp 报表模块.cpp
#include "stdafx.h"
#include"harRange.h"
#include"BookData.h"
void dayTaxis();
void saleTaxis();
void qtyTaxis();
void retailTable();
void wholesaleTable();
void showBook();
void mainshow();
www.eeworm.com/read/473173/6857237
cpp 收银模块.cpp
#include "stdafx.h"
#include"harRange.h"
#include"BookData.h"
#include"harRange.h"
#include
#include"BookData.h"
#include
#include
#include
void tran
www.eeworm.com/read/370365/9604790
ddb 语音模块.ddb
www.eeworm.com/read/173315/9662437
bas 模块变量.bas
Attribute VB_Name = "Module1"
Public g_SendOverFg As Boolean 'Static
'g_SendOverFg = False
Public g_InitialStr As String
'g_InitialStr = "123456789z"
Public g_flag As Integer
www.eeworm.com/read/366998/9786074
txt 编码模块.txt
module add_v(data_in,CLK,data_out);
input data_in;
input CLK;
output [1:0]data_out;
reg[1:0]data_out;
reg[1:0]counter;//0计数器,
always @(posedge CLK)
if(data_in==1'b1)
begin
www.eeworm.com/read/366998/9786088
txt 延时模块.txt
// 延时子模块
module subdelay1(clk,din,dout);
input clk;
input [7:0]din;
output [7:0]dout;
reg [7:0]dout;
always @(posedge clk)
begin
dout=din;
end
endmodule
www.eeworm.com/read/270040/11049932