代码搜索:RISC

找到约 3,488 项符合「RISC」的源代码

代码结果 3,488
www.eeworm.com/read/386805/8726760

repository

embedded_risc
www.eeworm.com/read/422910/10603454

repository

embedded_risc/embedded_risc
www.eeworm.com/read/422910/10603673

repository

embedded_risc
www.eeworm.com/read/141583/12997118

repository

embedded_risc
www.eeworm.com/read/184601/9092384

v test_risc_spm.v

module test_RISC_SPM (); reg rst; wire clk; parameter word_size = 8; reg [8:0] k; Clock_Unit M1 (clk); RISC_SPM M2 (clk, rst); // define probes wire [word_size-1:0] word0
www.eeworm.com/read/178074/9419134

html risc8doc.html

The RISC8 Verilog core
www.eeworm.com/read/372855/9489522

html risc8doc.html

The RISC8 Verilog core
www.eeworm.com/read/165522/10058718

vhd edata_reg_risc.vhd

LIBRARY ieee; use ieee.std_logic_1164.all; use ieee.std_logic_misc.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity EDATA_REG_RISC is port ( RESET_L
www.eeworm.com/read/161056/10458370

html risc8doc.html

The RISC8 Verilog core
www.eeworm.com/read/366291/7068137

bak alu_risc.v.bak

module Alu_RISC (alu_zero_flag, alu_out, data_1, data_2, sel); parameter word_size = 8, op_size = 4; // Opcodes parameter NOP = 4'b0000, ADD = 4'b0001, SUB = 4'b0010, AND = 4'b0011, NOT = 4