代码搜索:Process

找到约 10,000 项符合「Process」的源代码

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vhd t152.vhd

-- -- This file implements Latch inference on signals in a combinational process -- using incomplete sensitivity list. The signal Z should be allocated a latch -- if the synthesis tool allows you
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vhd t173.vhd

-- -- This file tests support for resourse sharing when using mutually exclusive -- function calls. -- Only one adder and one mux should result from the synthesis of that code. -- entity TEST is
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txt 新建 文本文档.txt

操作系统,模拟进程管理之PCB块管理法,C语言实现 使用了PCB进行进程管理控制,建立三个基本的队列:等待、执行、阻塞进行模拟 操作系统的进程管理,模拟进程的调度,模拟用户的创建、执行、阻塞、挂起、唤醒等操作 最近要准备准备操作系统考试,所以放一个程序跟大家分享 /* *yctc cg */ #include "stdio.h" #include "dos.h" #inc ...
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log isim.log

command line: ./test_register_isim_beh.exe -intstyle ise -ipchost localhost -ipcport 1044 Thu Apr 02 13:07:16 2009 Total Line Count : 263 Elaboration time : 0.03125
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plg ird.plg

礦ision2 Build Log Project: C:\Documents and Settings\zl0801\My Documents\IRD\IRD.uv2 Project File Date: 03/27/2007 Output: Build target 'Targe
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plg main.plg

Build target 'Target 1' compiling main.c... linking... *** WARNING L16: UNCALLED SEGMENT, IGNORED FOR OVERLAY PROCESS SEGMENT: ?PR?_INIT_MEMPOOL?INIT_MEM *** WARNING L16: UNCALLED SEGMENT, IGNORE
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qmsg led.map.qmsg

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
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qmsg prev_cmp_led.map.qmsg

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
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vhd cai_lizi.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity cai_lizi is port(ppclk:in std_logic; dzout:out integer range 0 to 122;
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cpp main.cpp

#include #include "flowchartsymbolpicker.h" int main(int argc, char *argv[]) { QApplication app(argc, argv); QMap symbolMap; symbolMap.insert(132, QObject::