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PWM 的代码
pwm.eww
$WS_DIR$\pwm.ewp
pwm.cpp
// -----------------------------------------------------------------------------
//
// THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
// ANY KIND, EITHER EXPRESSED OR IMPLIED,
pwm.h
//-----------------------------------------------------------------------------
//
// THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
// ANY KIND, EITHER EXPRESSED OR IMPLIED, I
pwm.prj
KEY LIBERO "8.3"
KEY CAPTURE "8.3.0.22"
KEY DEFAULT_IMPORT_LOC "C:\Actelprj\PWM\smartgen\PLL_1"
KEY DEFAULT_OPEN_LOC ""
KEY HDLTechnology "VERILOG"
KEY VendorTechnology_Family "Fusion"
KEY Vendo
pwm.c
#include /* common defines and macros */
#include /* derivative information */
#define uchar unsigned char
#define uint unsigned int
#define ulong unsigned
pwm.v
// PWM.v
//PWM模块
module PWM(wb_clk_i, wb_rst_i,wb_adr_i, wb_dat_i, wb_dat_o,wb_we_i, wb_cs_i,pwm_out);
parameter clock_divide_reg_init = 32'h0000_0000;
parameter duty_cycle_reg_init = 32'h0000_0
pwm_a.plg
礦ision2 Build Log
Project:
E:\SST51\ASM51\Zhiliu\Zhiliu.uv2
Project File Date: 01/01/2006
Output:
pwm_a.lnp
"Zhiliu.obj"
TO "PWM_A"
RAMSIZE(256)
pwm.h
/*****************************************/
/* Copyright (c) 2005, 通信工程学院 */
/* All rights reserved. */
/* 作 者：戴 佳 */
/****************************************