代码搜索:Memory

找到约 10,000 项符合「Memory」的源代码

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www.eeworm.com/read/314805/13558883

fdo visit_memory_wave.fdo

## NOTE: Do not edit this file. ## Autogenerated by ProjNav (creatfdo.tcl) on Thu Nov 15 13:55:43 中国标准时间 2007 ## vlib work vcom -93 -explicit visit_memory.vhdl vcom -93 -explicit visit_memory_
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pad_txt visit_memory.pad_txt

Release 6.2i - Par G.28 Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. Sun Nov 11 22:55:13 2007 INPUT FILE: visit_memory_map.ncd OUTPUT FILE: visit_memory_pad.txt PART TYPE:
www.eeworm.com/read/314805/13558926

ant visit_memory_wave.ant

-- C:\XILINX\BIN\MYCPU16 -- VHDL Annotation Test Bench created by -- HDL Bencher 6.1i -- Thu Nov 15 13:55:43 2007 LIBRARY IEEE; USE IEEE.STD_LOGIC_ARITH.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; LIB
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udo visit_memory_wave.udo

-- ProjNav VHDL simulation template: visit_memory_wave.udo -- You may edit this file after the line that starts with -- '-- START' to customize your simulation -- START user-defined simulation comm
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routed_ncd_tracker memory.routed_ncd_tracker

www.eeworm.com/read/310133/13657922

vhd memory_write_control.vhd

-------------------------------------------------------------- --地址线为3位 --由NIOS控制其值。 -------------------------------------------------------------- LIBRARY ieee; USE ieee.std_logic_1164.all; U