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memory.mak

/************* Code Composer V1 Project Data ******************** The following section contains data generated by Code Composer to store project information like build options, source filenames

memory.asm

.global start ; 定义全局标号 .text start: ldp #4 ; 直接寻址,装载DP值,页指针指向片内数据区DARAM B0 splk #1,1 ; 绝对地址201H开始的四个单元存1,2,3,4 splk #2,2 ; splk #3,3 ; splk #4,4 ; ; 以下使用间接寻址将201H开始的4个单元的数

memory.vhdl

library ieee; library UNISIM; use ieee.std_logic_1164.all; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; use UNISIM.VComponents.all; entity memory is port( T3: in std_logic

memory.twr

-------------------------------------------------------------------------------- Release 6.2i Trace G.28 Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. C:/Xilinx/bin/nt/trce.exe -ints

memory.ut

-w -g DebugBitstream:No -g Binary:no -g Gclkdel0:11111 -g Gclkdel1:11111 -g Gclkdel2:11111 -g Gclkdel3:11111 -g ConfigRate:4 -g CclkPin:PullUp -g M0Pin:PullUp -g M1Pin:PullUp -g M2Pin:Pu