代码搜索：Maxplus

找到约 394 项符合「Maxplus」的源代码

代码结果 394
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/124206/14589901

vhd debouncing.vhd

LIBRARY ieee; USE ieee.std_logic_1164.ALL; LIBRARY altera; USE altera.maxplus2.ALL; ENTITY debouncing IS PORT ( d_in, clk : IN STD_LOGIC; dd1, dd0, qq1, qq0 : OUT STD_LOGIC ; d_ou
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www.eeworm.com/read/313201/13592319

vhd mhz.vhd

MaxPlus 10p2 VHDL timing results: Device = EPF10K70RC240-4 File ADD_1P.TAO: clk l20.Q dffs0.Q 15.8ns 63.29MHz File ADD_2P.TAO: clk l20.Q dffs0.Q 15.8ns 63.29M
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www.eeworm.com/read/313201/13592327

v mhz.v

MaxPlus 10p2 Verilog timing results: Device = EPF10K70RC240-4 File ADD_1P.TAO: clk l20.Q dffs0.Q 15.8ns 63.29MHz File ADD_2P.TAO: clk l20.Q dffs0.Q 15.8ns 6
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www.eeworm.com/read/349112/10848939

dat license.dat

FEATURE maxplus2 alterad 2088.12 permanent uncounted EBC346C7EFDA \ HOSTID=00142a7be5ab SIGN="0063 4794 C69F F7DD E8E5 48FE 9D86 \ 60FC 5164 AA6F 2C87 BF8B 3259 5078 BFB1 1669 74F8 A413 B447 \ B
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