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找到约 10,000 项符合
Logic Analyzer 的代码
search.vhd
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-- Author : Tom Vu
-- Date : 09/07/97
ofdm.vhd
-- ================================================================================
-- File: ofdm.vhd
-- Version: v1.0
-- Author: olivercamel
-- Date: 4.26.2006
-- Description:
-- Top level file
dac5662_top.vhd
-- ###########################################################################
-- Module: DAC5662_TOP
-- Description:
-- This module for DAC5662.
-- Designed by: Ahrong
-- E-mail: jeawen.li
lut_a_f.vhd
--lut_a_f
library lpm;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity lut_a_f is
port (addr:in std_logic_vector(7 downto 0);
outdata:out std
butterfly1.vhd
library lpm;
use lpm.lpm_components.all;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity butterfly1 is
generic(w2:in
lut_a_f.vhd
--lut_a_f
library lpm;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity lut_a_f is
port (addr:in std_logic_vector(7 downto 0);
outdata:out std
keydecoder_deb.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY keydecoder_deb IS
PORT(
keyin : IN STD_LOGIC_VECTOR(3 DOWNTO 0); --键盘输入
keydrv : IN STD_LOGIC_VECTOR(3 D
butterfly1.vhd
library lpm;
use lpm.lpm_components.all;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity butterfly1 is
generic(w2:in
lut_a_f.vhd
--lut_a_f
library lpm;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity lut_a_f is
port (addr:in std_logic_vector(7 downto 0);
outdata:out std
butterfly1.vhd
library lpm;
use lpm.lpm_components.all;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity butterfly1 is
generic(w2:in