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cpldfit: version G.28 Xilinx Inc. Fitter Report Design Name: lcd Date: 4- 5-2005, 4:12PM Device

# XST (Creating Lso File) : lcd.lso # xst flow : RunXST lcd.syr lcd.prj lcd.sprj lcd.ana lcd.stx lcd.cmd_log lcd.ngc lcd.ngr # Implmentation : Translate (CPLD flow) __projnav/lcd_edfTOngd

set -tmpdir __projnav set -xsthdpdir ./xst run -ifn lcd.prj -ifmt mixed -ofn lcd -ofmt NGC -p xc9500xl -top lcd -opt_mode Speed -opt_level 1 -iuc NO -lso lcd.lso -keep_hierarchy YES -rtl

;Project navigator generated file. To produce the ascii report file, set your report preference to TEXT. ;Project navigator generated file. To produce the ascii report file, set your report preferenc

MDF Database: version 1.0 MDF_INFO | lcd | XC95144XL-10-TQ144 MACROCELL | 6 | 7 | data_BUFR.MC ATTRIBUTES | 133888 | 0 OUTPUTMC | 1 | 4 | 14 INPUTS | 10 | state_FFT1 | state_FFT3 | counter

library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Uncomment the following lines to use the declarations that are -- provided for i

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vhdl work lcd1602.vhdl vhdl work lcd.vhd

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/* * LCD controller Memory Map * * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. * TsiChung Liew (Tsi-Chung.Liew@freescale.com) * * See file CREDITS for list of people who contributed to