代码搜索结果
找到约 10,000 项符合
LCD 的代码
lcd.bgn
Release 7.1.04i - Bitgen H.42
Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved.
Loading device for application Rf_Device from file '3s400.nph' in environment
D:/Xilinx.
"lcd" is an NCD, v
lcd.lfp
# begin LFP file E:\Cindy\working\UE_EXTBOARD\LCD\LCD.lfp
designfile lcd.vhd
parttype xc3s400-4-pq208
bus_delimiter 0;
set_busdelim_onsave 0;
IO_GROUP "data" IO_GROUP="lcd" ;
INST "lcd" COLOR=15
lcd.mrp
Release 7.1.04i Map H.42
Xilinx Mapping Report File for Design 'lcd'
Design Information
------------------
Command Line : D:/Xilinx/bin/nt/map.exe -ise
e:\cindy\working\ue_extboard\lcd\LCD.ise -in
lcd.twr
--------------------------------------------------------------------------------
Release 7.1.04i Trace H.42
Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved.
D:/Xilinx/bin/nt/trce.exe -i
lcd.gfl
# XST (Creating Lso File) :
lcd.lso
# xst flow : RunXST
lcd_summary.html
# xst flow : RunXST
lcd.syr
lcd.prj
lcd.sprj
lcd.ana
lcd.stx
lcd.cmd_log
lcd.ngc
lcd.ngr
# Implmentation : Transl
lcd.xst
set -tmpdir __projnav
set -xsthdpdir ./xst
run
-ifn lcd.prj
-ifmt mixed
-ofn lcd
-ofmt NGC
-p xc3s400-4-pq208
-top lcd
-opt_mode Speed
-opt_level 1
-iuc NO
-lso lcd.lso
-keep_hierarchy NO
lcd.ucf
#PACE: Start of Constraints generated by PACE
#PACE: Start of PACE I/O Pin Assignments
NET "clk" LOC = "P79" ;
NET "data" LOC = "P96" ;
NET "data" LOC = "P97" ;
NET "data" LOC =