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FPGA 的代码
module_c.edf
(edif module_c
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap
(keywordLevel 0)
)
(status
(written
(timeStamp 2003 3 26 12 11 55)
(program "FPGA Express"
(versi
module_c.edf
(edif module_c
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap
(keywordLevel 0)
)
(status
(written
(timeStamp 2003 3 26 12 11 55)
(program "FPGA Express"
(versi
counter_xplorer.rpt
---------------------------------------------------------------------
FPGA Xplorer (tm) Version 9.0.04
2006-12-12 08:55:55
Command: xplorer counter -p=xc3s400-4pq208 -clk=clk
---------------
module_c.edf
(edif module_c
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap
(keywordLevel 0)
)
(status
(written
(timeStamp 2003 3 26 12 11 55)
(program "FPGA Express"
(versi
module_c.edf
(edif module_c
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap
(keywordLevel 0)
)
(status
(written
(timeStamp 2003 3 26 12 11 55)
(program "FPGA Express"
(versi
qqq.log
Amel ISP Version 5.0
Compilling chain file ....
Rebuilding Device Chain.
Device #1:
Device type = ATF1508AS
Number of fuses = 74136
Jedec file = D:\fpga\cp
ff.log
Amel ISP Version 5.0
Compilling chain file ....
Rebuilding Device Chain.
Device #1:
Device type = ATF1508AS
Number of fuses = 74136
Jedec file = D:\fpga\cp
锁存器.v
// Latch Inference
// download from: http://www.fpga.com.cn
module latchinf(enable, data, q);
input enable, data;
output q;
reg q;
always @(enable or data)
if (enable)
i8051_ctr.vhd
-- Modification by Koay Kah Hoe
-- Optimize for Xilinx Spartan II FPGA implementation
-- Version : 2.9a
--
-- Copyright (c) 1999-2001 Tony Givargis. Permission to copy is granted
-- provided that thi
基于arm的fpga加载配置实现-技术支持-龙人计算机嵌入式-arm.mht
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Date: Mon, 25 May 2009 08:29:41 +0800
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