代码搜索:Controller
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www.eeworm.com/read/339634/12213737
v vga_controller.v
module VGA_Controller( // Host Side
iCursor_RGB_EN,
iCursor_X,
iCursor_Y,
iCursor_R,
iCursor_G,
iCursor_B,
iRed,
iGreen,
iBlue,
oA
www.eeworm.com/read/150274/12301270
asm signal_controller.asm
;可更新计时时间,数字显示简单,倒计时不再连跳两秒
;各按键均可强制使用,可正确响应软件的各按钮设置
;时钟不太匹配
;---------端口定义----------------------
RG1 BIT P0.0
RG2 BIT P0.1
RG3 BIT P0.2
RG4 BIT
www.eeworm.com/read/336898/12408302
v lcd_controller.v
module LCD_Controller ( // Host Side
iDATA,iRS,
iStart,oDone,
iCLK,iRST_N,
// LCD Interface
LCD_DATA,
LCD_RW,
LCD_EN,
LCD_RS );
// CLK
paramet
www.eeworm.com/read/148725/12432843
v epcs_controller.v
//Legal Notice: (C)2005 Altera Corporation. All rights reserved. Your
//use of Altera Corporation's design tools, logic functions and other
//software and tools, and its AMPP partner logic function
www.eeworm.com/read/249911/12447371
h efax_controller.h
/* Copyright (C) 2001 to 2004 Chris Vine
This program is distributed under the General Public Licence, version 2.
For particulars of this and relevant disclaimers see the file
COPYING distributed wit
www.eeworm.com/read/249911/12447469
cpp efax_controller.cpp
/* Copyright (C) 2001 to 2004 Chris Vine
This program is distributed under the General Public Licence, version 2.
For particulars of this and relevant disclaimers see the file
COPYING distributed wit
www.eeworm.com/read/130914/14167569
v lcd_controller.v
module lcd_controller(
clock,
address,
data_in,
data_out,
go_read,
go_write,
chipselect,
complete,
rs,
rw,
e,
data);
parameter setup = 5;
parameter enable = 3;
param
www.eeworm.com/read/130914/14167633
v sram_controller.v
module sram_controller(
clock,
data_in,
go_read,
go_write,
chipselect,
complete,
data,
noe,
nwe,
ncs);
parameter idle = 0;
parameter s1 = 1;
parameter s2 = 2;
parameter s3
www.eeworm.com/read/129484/14239286
uv2 controller.uv2
### uVision2 Project, (C) Keil Software
### Do not modify !
Target (Target 1), 0x0000 // Tools: 'MCS-51'
Group (Source Group 1)
File 1,1, 0x0
File 1,2,
www.eeworm.com/read/230871/14271304
pm vga_controller.pm
use strict;
use europa_all;
my $slave_name = 's1';
my $master_name = 'm1';
my $VGA_DAC_LATENCY = 8;
#####################################################################################
#