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Control 的代码
control.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY control IS
PORT(reset:IN STD_LOGIC;
begend:IN STD_LOGIC;
k
control.hif
HIF003
--
-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, an
control.h
#ifndef __CONTROL_H__
#define __CONTROL_H__
#include "../ucos-ii/includes.h" /* uC/OS interface */
#include "../src/GUI/gui.h"
#include "../ucos-ii/add/list.h"
#if USE_MINIGUI==
control.v
`timescale 1ns/10ps
module control(nGCLK, nWAIT,
nRESET, DABORT, IABORT, nFIQ, nIRQ,
ISYNC, CHSD, CHSE, ID, IA, irq_disable, fiq_disable,
flags_ex, load_pc_me, exception_to_id,
pc, inst_if,
control.v
module control(din, clk, rst, arload, pcload, pcinc, drload, acload, acinc, irload, alusel, membus, pcbus, drbus, read);
input [1:0] din;
input clk, rst;
output arload, pcload, pcinc, drload, acloa
control.v
module control(din,clk,rst,z,read,write,arload,arinc,pcinc,pcload,drload,trload,irload,rload,alus,acload,zload,pcbus,drhbus,drlbus,trbus,rbus,acbus,membus,busmem);
input [7:0]din;
input clk,rst,z;