control.vhd

应用MaxplusII平台的数字时钟的VHDL源程序

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY control IS
PORT(reset:IN STD_LOGIC;
           begend:IN STD_LOGIC;
           keyup:IN STD_LOGIC;
           enter:IN STD_LOGIC;
           settime:OUT STD_LOGIC;
           hourhset:OUT INTEGER RANGE 0 TO 2;
           hourlset:OUT INTEGER RANGE 0 TO 9;
           minhset:OUT INTEGER RANGE 0 TO 5;
           minlset:OUT INTEGER RANGE 0 TO 9; 
           sechset:OUT INTEGER RANGE 0 TO 5;
           seclset:OUT INTEGER RANGE 0 TO 9);
    END control;
    ARCHITECTURE archi OF control IS 
      TYPE STATE IS(sethh,sethl,setmh,setml,setsh,setsl,ini);
      SIGNAL adjsta:STATE;
      SIGNAL setmark:STD_LOGIC;
      SIGNAL seclow,minlow,hourlow:INTEGER RANGE 0 TO 9;
      SIGNAL sechigh,minhigh:INTEGER RANGE 0 TO 5;
      SIGNAL hourhigh:INTEGER RANGE 0 TO 2;
    BEGIN
      seclset<=seclow;
      sechset<=sechigh;
      minlset<=minlow;
      minhset<=minhigh;
      hourlset<=hourlow;
      hourhset<=hourhigh;
      settime<=setmark;
    mark:
    PROCESS(begend)
      begin
        if reset='1'then
           setmark<='0';
        elsif begend'event and begend = '1'then
          if setmark='1'then
            setmark<='0';
          else
            setmark<='1';
          end if;
        end if;
    END PROCESS;
    normal_run:
      PROCESS(enter,reset)
        BEGIN
          IF reset='1'THEN
                 adjsta<=ini;
          ELSif enter='1'AND enter'event THEN
                case adjsta IS
                    WHEN ini=>
                         adjsta<=sethh;
                    WHEN sethh=>
                         adjsta<=sethl;
                    WHEN sethl=>
                         adjsta<=setmh;
                    WHEN setmh=>
                         adjsta<=setml;
                    WHEN setml=>
                         adjsta<=setsh;
                    WHEN setsh=>
                         adjsta<=setsl;
                    WHEN setsl=>
                         adjsta<=sethh;
                end case;
          END IF;
      END PROCESS;
   time_adjust:
      PROCESS(keyup)
        BEGIN
          if reset='1'then
             hourhigh<=0;
             hourlow<=0;
             minhigh<=0;
             minlow<=0;
             sechigh<=0;
             seclow<=0;
          elsif keyup='1'AND keyup'event THEN
                case adjsta IS
                     WHEN sethh=>
                          hourhigh<=hourhigh+1;
                     WHEN sethl=>
                          hourlow<=hourlow+1;
                     WHEN setmh=>
                          minhigh<=minhigh+1;
                     WHEN setml=>
                          minlow<=minlow+1;
                     WHEN setsh=>
                          sechigh<=sechigh+1;
                     WHEN setsl=>
                          seclow<=seclow+1;
                     WHEN ini=>
                          NULL;
                end case;
          end if;
       END PROCESS;
END archi;