代码搜索:Clock

找到约 10,000 项符合「Clock」的源代码

代码结果 10,000
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pcf clock.pcf

SCHEMATIC START ; // created by map version G.28 on Wed Nov 21 16:43:42 2007 SCHEMATIC END ;
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vhdl clock.vhdl

library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Uncomment the following lines to use the declarations that are -- provided for ins
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prj clock.prj

vhdl work clock.vhdl
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mrp clock.mrp

Release 6.2i Map G.28 Xilinx Mapping Report File for Design 'clock' Design Information ------------------ Command Line : C:/Xilinx/bin/nt/map.exe -intstyle ise -p xcv200-pq240-4 -cm area -pr b -k
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syr clock.syr

Release 6.2i - xst G.28 Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to __projnav CPU : 0.00 / 0.38 s | Elapsed : 0.00 / 0.00 s --> Parameter xsthdpdir set to
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xst clock.xst

set -tmpdir __projnav set -xsthdpdir ./xst run -ifn clock.prj -ifmt mixed -ofn clock -ofmt NGC -p xcv200-4-pq240 -top clock -opt_mode Speed -opt_level 1 -iuc NO -lso clock.lso -keep_hiera
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ut clock.ut

-w -g DebugBitstream:No -g Binary:no -g Gclkdel0:11111 -g Gclkdel1:11111 -g Gclkdel2:11111 -g Gclkdel3:11111 -g ConfigRate:4 -g CclkPin:PullUp -g M0Pin:PullUp -g M1Pin:PullUp -g M2Pin:Pu
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ngr clock.ngr

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par clock.par

Release 6.2i Par G.28 Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved. hit58:: Wed Nov 21 16:43:43 2007 C:/Xilinx/bin/nt/par.exe -w -intstyle ise -ol std -t 1 clock_map.ncd clock.ncd cl
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ngc clock.ngc