代码搜索:Carry

找到约 8,060 项符合「Carry」的源代码

代码结果 8,060
www.eeworm.com/read/233706/14142716

h diskinfo.h

#define VWIN32_DIOC_DOS_INT21 (1) #define VWIN32_DIOC_DOS_INT25 (2) #define VWIN32_DIOC_DOS_INT26 (3) #define VWIN32_DIOC_DOS_DRIVEINFO (6) #define CARRY_FLAG 1 #define READSEC
www.eeworm.com/read/223125/14655453

sym fen60.sym

VERSION 5 BEGIN SYMBOL fen60 SYMBOLTYPE BLOCK TIMESTAMP 2006 2 21 4 12 29 SYMPIN 0 -160 Input clk SYMPIN 0 -32 Input rst SYMPIN 384 -160 Output carry SYMPIN 384 -96 Output qout1(3:0) SYMPIN 38
www.eeworm.com/read/223125/14655798

sym fen24.sym

VERSION 5 BEGIN SYMBOL fen24 SYMBOLTYPE BLOCK TIMESTAMP 2006 2 21 4 12 23 SYMPIN 0 -160 Input clk SYMPIN 0 -32 Input rst SYMPIN 384 -160 Output carry SYMPIN 384 -96 Output qout1(3:0) SYMPIN 38
www.eeworm.com/read/117452/14919855

h diskinfo.h

#define VWIN32_DIOC_DOS_INT21 (1) #define VWIN32_DIOC_DOS_INT25 (2) #define VWIN32_DIOC_DOS_INT26 (3) #define VWIN32_DIOC_DOS_DRIVEINFO (6) #define CARRY_FLAG 1 #define READSEC
www.eeworm.com/read/214085/15113921

tdf cntr_f8k.tdf

--lpm_counter CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone II" lpm_direction="UP" lpm_modulus=25000000 lpm_port_updown="PORT_UNUSED" lpm_width=25 clock cout q sclr CARRY_CHAIN="MANUAL"
www.eeworm.com/read/18610/797117

vhd cnt4000.vhd

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; ENTITY cnt4000 IS PORT(reset,en,clk:IN STD_ULOGIC; carry1:OUT STD_ULOGIC; q:OUT STD_LOGIC_VECTOR(11 DOWNTO 0))
www.eeworm.com/read/18610/797155

vhd cnt1000.vhd

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; ENTITY cnt1000 IS PORT(reset,en,clk:IN STD_ULOGIC; carry1:OUT STD_ULOGIC; q:OUT STD_ULOGIC_VECTOR(9 DOWNTO 0))
www.eeworm.com/read/18610/797187

vhd cnt40000.vhd

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; ENTITY cnt40000 IS PORT(reset,en,clk:IN STD_ULOGIC; carry1:OUT STD_ULOGIC; q:OUT STD_LOGIC_VECTOR(15 DOWNTO 0)
www.eeworm.com/read/18610/797289

vhd cnt10.vhd

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; ENTITY cnt10 IS PORT(reset,en,clk:IN STD_ULOGIC; carry1:OUT STD_ULOGIC; q:OUT STD_ULOGIC_VECTOR(3 DOWNTO 0));
www.eeworm.com/read/479931/1326447

cgs addxicc.cgs

# frv testcase for addxicc $GRi,$s10,$GRk,$ICCi_1 # mach: all .include "testutils.inc" start .global addxicc addxicc: set_gr_immed 2,gr8 set_icc 0x0e,0 ; Make sure carry bit is off