📄 cntr_f8k.tdf
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--lpm_counter CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone II" lpm_direction="UP" lpm_modulus=25000000 lpm_port_updown="PORT_UNUSED" lpm_width=25 clock cout q sclr CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48
--VERSION_BEGIN 6.0 cbx_cycloneii 2006:02:07:15:19:20:SJ cbx_lpm_add_sub 2006:01:09:11:17:20:SJ cbx_lpm_compare 2006:01:09:11:15:40:SJ cbx_lpm_counter 2006:03:23:14:19:24:SJ cbx_lpm_decode 2006:01:09:11:16:44:SJ cbx_mgl 2006:05:17:10:06:16:SJ cbx_stratix 2006:05:17:09:28:32:SJ cbx_stratixii 2006:03:03:09:35:36:SJ VERSION_END
-- Copyright (C) 1991-2006 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
FUNCTION cycloneii_lcell_comb (cin, dataa, datab, datac, datad)
WITH ( LUT_MASK, SUM_LUTC_INPUT)
RETURNS ( combout, cout);
FUNCTION cycloneii_lcell_ff (aclr, clk, datain, ena, sclr, sdata, sload)
RETURNS ( regout);
--synthesis_resources = lut 42 reg 25
SUBDESIGN cntr_f8k
(
clock : input;
cout : output;
q[24..0] : output;
sclr : input;
)
VARIABLE
counter_comb_bita0 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita1 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita2 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita3 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita4 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita5 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita6 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita7 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita8 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita9 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita10 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita11 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita12 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita13 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita14 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita15 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita16 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita17 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita18 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita19 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita20 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita21 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita22 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita23 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_comb_bita24 : cycloneii_lcell_comb
WITH (
LUT_MASK = "5A90",
SUM_LUTC_INPUT = "cin"
);
counter_reg_bit1a[24..0] : cycloneii_lcell_ff;
cmpr2_aeb_int : WIRE;
cmpr2_aeb : WIRE;
cmpr2_dataa[24..0] : WIRE;
cmpr2_datab[24..0] : WIRE;
aclr_actual : WIRE;
clk_en : NODE;
cnt_en : NODE;
compare_result : WIRE;
cout_actual : WIRE;
data[24..0] : NODE;
external_cin : WIRE;
modulus_bus[24..0] : WIRE;
modulus_trigger : WIRE;
s_val[24..0] : WIRE;
safe_q[24..0] : WIRE;
sload : NODE;
sset : NODE;
time_to_clear : WIRE;
updown_dir : WIRE;
BEGIN
counter_comb_bita[24..0].cin = ( counter_comb_bita[23..0].cout, external_cin);
counter_comb_bita[24..0].dataa = ( counter_reg_bit1a[24..0].regout);
counter_comb_bita[24..0].datab = ( updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir);
counter_comb_bita[24..0].datad = ( B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1");
counter_reg_bit1a[].aclr = aclr_actual;
counter_reg_bit1a[].clk = clock;
counter_reg_bit1a[].datain = ( counter_comb_bita[24..0].combout);
counter_reg_bit1a[].ena = (clk_en & (((sclr # sset) # sload) # cnt_en));
counter_reg_bit1a[].sdata = ((! sclr) & ((sset & s_val[]) # ((! sset) & ((sload & data[]) # (((! sload) & modulus_bus[]) & (! updown_dir))))));
counter_reg_bit1a[].sload = (((sclr # sset) # sload) # modulus_trigger);
IF (cmpr2_dataa[] == cmpr2_datab[]) THEN
cmpr2_aeb_int = VCC;
ELSE
cmpr2_aeb_int = GND;
END IF;
cmpr2_aeb = cmpr2_aeb_int;
cmpr2_dataa[] = safe_q[];
cmpr2_datab[] = modulus_bus[];
aclr_actual = B"0";
clk_en = VCC;
cnt_en = VCC;
compare_result = cmpr2_aeb;
cout = cout_actual;
cout_actual = (counter_comb_bita[24].cout # (time_to_clear & updown_dir));
data[] = GND;
external_cin = B"1";
modulus_bus[] = B"1011111010111100000111111";
modulus_trigger = cout_actual;
q[] = safe_q[];
s_val[] = B"1111111111111111111111111";
safe_q[] = counter_reg_bit1a[].regout;
sload = GND;
sset = GND;
time_to_clear = compare_result;
updown_dir = B"1";
END;
--VALID FILE
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