代码搜索：Bit

找到约 10,000 项符合「Bit」的源代码

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热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/473852/6842087

c fm24c256.c

/*--------------------------------------------- 读写24C16标准程序段 Modified by:rgh111,for FM24C256. 04-3-18 17:08 I have deleted the page read &write subroutine. -------------------------------------
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www.eeworm.com/read/472774/6865441

h io_map.h

/** ################################################################### ** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT. ** Filename : IO_Map.H ** Project : DG128 **
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inc steppervar.inc

;--------------------------------------------------- ; Register & Bits Declarations for the Liquid Mixing ;--------------------------------------------------- ;Stepper Used Registers ;-----
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bak steppervar.bak

;--------------------------------------------------- ; Register & Bits Declarations for the Liquid Mixing ;--------------------------------------------------- ;Stepper Used Registers ;-----
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www.eeworm.com/read/294235/8245415

h ccs_p16.h

/* CCS compiler-sepcific definitions for PIC16F877 or PIC18C452 */ #ID CHECKSUM // ID bytes are checksum #ZERO_RAM // Wipe RAM for safety #define WORD unsigned
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www.eeworm.com/read/294002/8258489

c camproset.c

/****************************************************************************** Filename: camproset.c Descriptions - Camera Processor Initialization code using IIC. History - July 23, 2003.
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www.eeworm.com/read/192755/8284975

c crcbuildtable.c

/**************************************************************************************** *文件名:crcBuildTable.c COPYRIGHT(C) JINYANLAI * All Rights Reserved *说明:根据crc.h中选择的CRC校验生
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www.eeworm.com/read/173923/9630160

h histo.h

/* This file provides the bit-probabilities for the input file */ #define BIT_DIVIDER 629 static int bits[9] = { 179,167,183,165,159,198,178,119,}; /* ia32 .so files */
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h config.h

/****************************************************************************** * * $RCSfile: $ * $Revision: $ * * This module provides information about the project configuration * Copyri
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txt ym3_8.txt

library ieee; use ieee.std_logic_1164.all; entity ym3_8 is port(a0,a1,a2:in bit; s1,s2,s3:in bit; y0,y1,y2,y3,y4,y5,y6,y7:out bit); end ym3_8; architecture rtl of ym3_8 is signal s
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