代码搜索:Annotation

找到约 6,069 项符合「Annotation」的源代码

代码结果 6,069
www.eeworm.com/read/210231/15203918

ant s59_tw.ant

-- E:\VHDL\WAITPAST\DIG_CLK -- VHDL Annotation Test Bench created by -- HDL Bencher 6.1i -- Wed Apr 18 11:36:41 2007 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; USE
www.eeworm.com/read/7658/126331

bmm system_bd.bmm

// BMM LOC annotation file. // // Release 8.2.02i - Data2MEM I.34, build 1.4.8 June 19, 2006 // Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved. // // Created on 04/01/08 07:04 pm //
www.eeworm.com/read/17583/740087

bmm system_bd.bmm

// BMM LOC annotation file. // // Release 8.2.02i - Data2MEM I.34, build 1.4.8 June 19, 2006 // Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved. // // Created on 04/01/08 07:04 pm //
www.eeworm.com/read/18597/796595

ant test.ant

-- C:\XILINX\BIN\DPRAM2 -- VHDL Annotation Test Bench created by -- HDL Bencher 6.1i -- Fri Sep 01 20:09:30 2006 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; USE IEEE
www.eeworm.com/read/480693/1314685

bmm vsk_camera_vop_cw_bd.bmm

// BMM LOC annotation file. // // Release 9.2.03i - Data2MEM J.39, build 1.5.4 Aug 14, 2007 // Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved. // // Created on 05/23/08 09:58 am //
www.eeworm.com/read/480693/1314687

bmm vsk_camera_vop_cw_bd.bmm

// BMM LOC annotation file. // // Release 9.2.03i - Data2MEM J.39, build 1.5.4 Aug 14, 2007 // Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved. // // Created on 06/04/08 10:19 am //
www.eeworm.com/read/480693/1314689

bmm vsk_camera_vop_cw_bd.bmm

// BMM LOC annotation file. // // Release 9.2.03i - Data2MEM J.39, build 1.5.4 Aug 14, 2007 // Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved. // // Created on 05/23/08 11:40 am //
www.eeworm.com/read/419129/2080763

java testmyannotation.java

/** * Copyright (c)上海烟草(集团)公司与上海康时信息系统有限公司。 */ package com.test.annotation; import java.lang.reflect.Field; import java.lang.reflect.Method; import org.apache.commons.logging.Log; import
www.eeworm.com/read/177213/9464808

ant clk_div3_tbw.ant

-- F:\CLK_DIV3 -- VHDL Annotation Test Bench created by -- HDL Bencher 6.1i -- Mon Mar 13 15:50:32 2006 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; USE IEEE.STD_LOGI
www.eeworm.com/read/169299/9868172

ant selwave.ant

-- D:\FPGA\XC_9572 -- VHDL Annotation Test Bench created by -- HDL Bencher 6.1i -- Tue Apr 25 16:03:10 2006 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.NUMERIC_STD.ALL; USE IEEE.STD_LOGI