system_bd.bmm

本系统由服务器软件控制平台和fpga硬件处理系统组成

// BMM LOC annotation file.
//
// Release 8.2.02i - Data2MEM I.34, build 1.4.8 June 19, 2006
// Copyright (c) 1995-2008 Xilinx, Inc.  All rights reserved.
//
// Created on 04/01/08 07:04 pm
//


///////////////////////////////////////////////////////////////////////////////
//
// Processor 'ppc405_0', ID 100, memory map.
//
///////////////////////////////////////////////////////////////////////////////

ADDRESS_MAP ppc405_0 PPC405 100


    ///////////////////////////////////////////////////////////////////////////////
    //
    // Processor 'ppc405_0' address space 'plb_bram_if_cntlr_1_bram_combined' 0xFFFF0000:0xFFFFFFFF (64 KB).
    //
    ///////////////////////////////////////////////////////////////////////////////

    ADDRESS_SPACE plb_bram_if_cntlr_1_bram_combined RAMB16 [0xFFFF0000:0xFFFFFFFF]
        BUS_BLOCK
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_0 [63:62] PLACED = X6Y14;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_1 [61:60] PLACED = X7Y13;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_2 [59:58] PLACED = X6Y13;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_3 [57:56] PLACED = X6Y12;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_4 [55:54] PLACED = X7Y11;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_5 [53:52] PLACED = X7Y9;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_6 [51:50] PLACED = X7Y10;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_7 [49:48] PLACED = X7Y12;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_8 [47:46] PLACED = X4Y8;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_9 [45:44] PLACED = X4Y9;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_10 [43:42] PLACED = X4Y5;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_11 [41:40] PLACED = X4Y6;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_12 [39:38] PLACED = X6Y6;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_13 [37:36] PLACED = X7Y6;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_14 [35:34] PLACED = X7Y7;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_15 [33:32] PLACED = X7Y8;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_16 [31:30] PLACED = X3Y8;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_17 [29:28] PLACED = X6Y7;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_18 [27:26] PLACED = X3Y11;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_19 [25:24] PLACED = X3Y10;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_20 [23:22] PLACED = X6Y5;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_21 [21:20] PLACED = X5Y5;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_22 [19:18] PLACED = X5Y6;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_23 [17:16] PLACED = X7Y5;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_24 [15:14] PLACED = X3Y7;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_25 [13:12] PLACED = X3Y9;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_26 [11:10] PLACED = X5Y13;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_27 [9:8] PLACED = X5Y12;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_28 [7:6] PLACED = X4Y10;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_29 [5:4] PLACED = X4Y11;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_30 [3:2] PLACED = X4Y7;
            ppc_sys/plb_bram_if_cntlr_1_bram/plb_bram_if_cntlr_1_bram/ramb16_s2_s2_31 [1:0] PLACED = X5Y7;
        END_BUS_BLOCK;
    END_ADDRESS_SPACE;

END_ADDRESS_MAP;