代码搜索：如何学习 PWm？
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www.eeworm.com/read/286967/8734222
v pwm.v
// PWM.v
//PWM模块
module PWM(wb_clk_i, wb_rst_i,wb_adr_i, wb_dat_i, wb_dat_o,wb_we_i, wb_cs_i,pwm_out);
parameter clock_divide_reg_init = 32'h0000_0000;
parameter duty_cycle_reg_init = 32'h0000_0
www.eeworm.com/read/386476/8744364
plg pwm_a.plg
礦ision2 Build Log
Project:
E:\SST51\ASM51\Zhiliu\Zhiliu.uv2
Project File Date: 01/01/2006
Output:
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h pwm.h
/*****************************************/
/* Copyright (c) 2005, 通信工程学院 */
/* All rights reserved. */
/* 作 者：戴 佳 */
/****************************************
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lst pwm.lst
C51 COMPILER V7.02b PWM 12/10/2005 20:24:09 PAGE 1
C51 COMPILER V7.02b, COMPILATION OF MODULE PWM
OBJECT MODULE PLACED IN PW
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obj pwm.obj
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c pwm.c
/*****************************************/
/* Copyright (c) 2005, 通信工程学院 */
/* All rights reserved. */
/* 作 者：戴 佳 */
/****************************************
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sch pwm.sch
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v pwm.v
module PWM(clk,addr,wr_n,wrdata,reset,pwm1,pwm2,pwm3,pwm4);
input clk,wr_n,reset;
input [1:0]addr;
input [15:0]wrdata;
output pwm1,pwm2,pwm3,pwm4;
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v pwm.v
module PWM(clk,addr,wr_n,wrdata,reset,pwm1,pwm2,pwm3,pwm4);
input clk,wr_n,reset;
input [1:0]addr;
input [15:0]wrdata;
output pwm1,pwm2,pwm3,pwm4;