搜索：vhdl - 虫虫下载站

https://www.eeworm.com/dl/639/318105.html 文件格式

基于FPGA的驱动LED静态显示的VHDL实现

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#FPGA #VHDL #LED #驱动

https://www.eeworm.com/dl/663/318342.html VHDL/FPGA/Verilog

VHDL写的SCI接口。quartusII6.0的工程！

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#quartusII #VHDL #SCI #6.0

https://www.eeworm.com/dl/663/319494.html VHDL/FPGA/Verilog

vhdl程序 Uncomment the following lines to use the declarations that are provided for instantiating Xi

vhdl程序 Uncomment the following lines to use the declarations that are provided for instantiating Xilinx primitive components.

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#instantiating #declarations #Uncomment #the

https://www.eeworm.com/dl/663/320000.html VHDL/FPGA/Verilog

Very good info. for RS-232 transmitter VHDL code .

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#transmitter #Very #VHDL #good

https://www.eeworm.com/dl/663/320001.html VHDL/FPGA/Verilog

Very good info. for RS-232 receive VHDL code .

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#receive #Very #VHDL #good

https://www.eeworm.com/dl/663/320002.html VHDL/FPGA/Verilog

Very good info. for RS-232 echo VHDL code .

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#Very #VHDL #good #echo

https://www.eeworm.com/dl/663/324173.html VHDL/FPGA/Verilog

VHDL语言编写的DAC0832代码

VHDL语言编写的DAC0832代码，简短而又易懂，可供参考

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#VHDL #0832 #DAC #语言

https://www.eeworm.com/dl/663/324201.html VHDL/FPGA/Verilog

rs422接 VHDL语言编写 chipescope仿真通过

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#chipescope #VHDL #422 #rs

https://www.eeworm.com/dl/663/324270.html VHDL/FPGA/Verilog

串行接口UART的用VHDL语言的简单实现

串行接口UART的用VHDL语言的简单实现，希望对大家有帮助

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#UART #VHDL #串行接口 #语言

https://www.eeworm.com/dl/663/324422.html VHDL/FPGA/Verilog

VHDL编写的四位加法计数器

VHDL编写的四位加法计数器，可以通过QuartusII环境验证

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#VHDL #编写 #加法 #计数器