搜索：system verilog - 虫虫下载站

技术资料  占空比百分之五十三分频器

verilog三分频占空比50%，有波形图。

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三分频

技术资料  ps2源码

PS2接口verilog源代码，包含工程文件和注释

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源码

技术资料  vcs5.0

vcs5.0,verilog hdl快速，效率更更高的仿真工具

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verilog

技术资料  FPGA实现串口通信

基于FPGA的串口通信，程序使用Verilog硬件描述语言。

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FPGA 实现串口通信

教程资料  XAPP806 -决定DDR反馈时钟的最佳DCM相移

This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microproces ...

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XAPP 806 DDR DCM

可编程逻辑  XAPP806 -决定DDR反馈时钟的最佳DCM相移

This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microproces ...

https://www.eeworm.com/dl/kbcluoji/40078.html

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XAPP 806 DDR DCM

其他数据库  As information technology is more and more in-depth and wide range of applications, management infor

As information technology is more and more in-depth and wide range of applications, management information system has been gradually implemented in the technical maturity. Management Information System is a continuous development of new disciplines. Library Management System is a typical management ...

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more applications information technology

VHDL/FPGA/Verilog 基于Altera公司系列FPGA(Cyclone EP1C3T144C8)、Verilog HDL、MAX7219数码管显示芯片、4X4矩阵键盘、TDA2822功放芯片及扬声器等实现了《电子线路设计&

基于Altera公司系列FPGA(Cyclone EP1C3T144C8)、Verilog HDL、MAX7219数码管显示芯片、4X4矩阵键盘、TDA2822功放芯片及扬声器等实现了《电子线路设计&#8226 测试&#8226 实验》课程中多功能数字钟实验所要求的所有功能和其它一些扩展功能。包括：基本功能——以数字形式显示时、分、秒的时间，小时计数器为同步24进制，可手 ...

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Cyclone Verilog Altera 144C

VHDL/FPGA/Verilog 有实验结果,用MOSIN6编写的,是Verilog HDL语言实现的. 练习三利用条件语句实现计数分频时序电路实验目的： 1. 掌握条件语句在简单时序模块设计中的使用； 2. 学习在Ver

有实验结果,用MOSIN6编写的,是Verilog HDL语言实现的. 练习三利用条件语句实现计数分频时序电路实验目的： 1. 掌握条件语句在简单时序模块设计中的使用； 2. 学习在Verilog模块中应用计数器； 3. 学习测试模块的编写、综合和不同层次的仿真。练习四阻塞赋值与非阻塞赋值的区别实验目的： 1．通过实验，掌握阻塞赋值与 ...

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Verilog MOSIN6 HDL Ver

书籍  Telecom Frontends

The ability to analyze system or circuit behavior is one of the key requirements for successful design. To put an idea to work, a designer needs both the knowledge and tools for analyzing the behavior of that new system architecture or that experi- mental circuit topology. Design decisions are groun ...

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