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技术资料 SN74LS699.pdf
英文描述： SYNCHRONOUS UP/DOWN COUNTERS WITH OUTPUT REGISTERS AND MULTIPLEXED 3-STATE OUTPUTS
中文描述： 向上/有输出寄存器和多路3向下计数器同步态输出
技术资料 SN74LS696.pdf
英文描述： SYNCHRONOUS UP/DOWN COUNTERS WITH OUTPUT REGISTERS AMD MULTIPLEXED 3-STATE OUTPUTS
中文描述： 向上/输出寄存器与AMD公司向下计数器同步复用三态输出
文件格式 This paper presents a low-power asynchronous implementation of the 80C51 microcontroller. It was rea
This paper presents a low-power asynchronous implementation of the 80C51 microcontroller. It was realized in a 0.5 &micro m CMOS process and it shows a power advantage of a factor 4 compared to a recent synchronous implementation in the same technology. The chip is fully bit compatible with the sync ...
加密解密 CRC码产生器与校验器程序 Features ： Executes in one clock cycle per data word Any polynomial from 4 to 32 b
CRC码产生器与校验器程序
Features ：
Executes in one clock cycle per data word
Any polynomial from 4 to 32 bits
Any data width from 1 to 256 bits
Any initialization value
Synchronous or asynchronous reset
串口编程 一个简单的ＳＰＩ ＩＰ核
一个简单的ＳＰＩ ＩＰ核，SPI Core Specifications 可以从说明文档中找到！
The simple Serial Peripheral Interface core is an enhanced version of the Serial Peripheral Interface found on Motorola s M68HC11 family of CPUs. The Serial Peripheral Interface is a serial, synchronous communication protocol ...
技术资料 Sd_sig.vsd
Sd_sig.vsd
Introduction
Synchronous DRAMs have become the memory standard in many designs. They provide substantial advances in
DRAM performance. They synchronously burst data at clock speeds presently up to 143MHz. They also provide
hidden precharge time and the ability to randomly change column ad ...
技术资料 Sd_cnfg.vsd
Sd_cnfg.vsd
Introduction
Synchronous DRAMs have become the memory standard in many designs. They provide substantial advances in
DRAM performance. They synchronously burst data at clock speeds presently up to 143MHz. They also provide
hidden precharge time and the ability to randomly change column a ...
技术资料 基于DSP及IPM的永磁同步电机直接转矩控制研究与实践
·【英文题名】 Research of the Direct Torque Control in the Permanent Magnet Synchronous Motor Based on DSP and IPM 【作者中文名】 肖礼飞; 【导师】 郑黎明; 【学位授予单位】 汕头大学; 【学科专业名称】 机械电子工程 【学位年度】 2005 【论文级别】 硕士 【网络出版投稿人】 汕头大学 【 ...
VHDL/FPGA/Verilog vhdl编写
vhdl编写，8b—10b 编解码器设计
Encoder:
8b/10b Encoder (file: 8b10b_enc.vhd)
Synchronous clocked inputs (latched on each clock rising edge)
8-bit parallel unencoded data input
KI input selects data or control encoding
Asynchronous active high reset initializes all logic
Encoded data output
...
技术资料 基于滑模观测器与分数阶锁相环的无传感器PMSM矢量控制
Abstract: A sliding mode observer and fractional-order phase-locked loop (FO-PLL) method is proposed for the sensorless speed control of a permanent magnet synchronous motor (PMSM).The saturation function is adopted in order to reduce the chattering phenomenon caused by the sliding mode observer. In ...