搜索：design - 虫虫下载站

技术资料  SLX-16MS-1_datasheet

n 16 ports of fast 10/100 Ethernet n High port count in a small footprint n Truly rugged design with -40 to 75°C operation n Easy to configure management functions

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SLX-16MS datasheet

技术资料  114341531

基于单片机的录放系统设计录音芯片为ISD2560-Recording system based on single-chip design for ISD2560 audio chip

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114341531

技术资料  基于变频调速的粗纱机四电机系统设计

基于变频调速的粗纱机四电机系统设计 Design of Four-motor System Based on Variable Frequency Drive for Fly F

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变频调速

Modules photovoltaïques (PV) au silicium cristallin pour application terrestre – Qualification de la conception et homologation Crystalline silicon terrestrial photovoltaic (PV) modules – Design qualification and type approval

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61215

allegro State Machine Coding Styles for Synthesis

&nbsp; 本文论述了状态机的verilog编码风格,以及不同编码风格的优缺点，Steve Golson&#39;s 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state machine design using Verilog, VHDL and Synopsys tools. Steve&#39;s paper alsooffers in-depth background concernin ...

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Synthesis Machine Coding Styles

可编程逻辑  XAPP444 - CPLD配件,技巧和窍门

Most designers wish to utilize as much of a device as possible in order to enhance the overallproduct performance, or extend a feature set. As a design grows, inevitably it will exceed thearchitectural limitations of the device. Exactly why a design does not fit can sometimes bedifficult to determ ...

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XAPP CPLD 444 配件

可编程逻辑  State Machine Coding Styles for Synthesis

&nbsp; 本文论述了状态机的verilog编码风格,以及不同编码风格的优缺点，Steve Golson&#39;s 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state machine design using Verilog, VHDL and Synopsys tools. Steve&#39;s paper alsooffers in-depth background concernin ...

https://www.eeworm.com/dl/kbcluoji/40134.html

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Synthesis Machine Coding Styles

VHDL/FPGA/Verilog DDR SDRAM控制器的VHDL源代码

DDR SDRAM控制器的VHDL源代码，含详细设计文档。 The DDR, DCM, and SelectI/O&#8482 features in the Virtex&#8482 -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock Manager (DCM) provides the required Delay Locked Loop (DLL), Dig ...

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SDRAM VHDL DDR 控制器

技术资料  低成本24 位模数芯片ADS1211 在地震仪器中的设计及应用

介绍了一种高性能低成本24位模数芯片ADS1211的结构及特点。阐述了芯片ADS1211与单片机的接口电路设计与实现;并介绍了此芯片控制软件的流程设计和在实际地震仪器设计中的应用案例。The structure and characteristics of a high performance and low cost 24-bit analog-digital chip ADS1211 are introduced. This paper de ...

https://www.eeworm.com/dl/894699.html

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成本 24 芯片 ads1211 地震仪器

技术资料  基于单片机的酒精浓度测试仪设计

按照测试仪实现的要求功能,使用单片机搭以其它硬件对各个模块进行设计,通过对电路的设计分析,实现酒精测试仪的各个模块的指标要求。并通过对软件进行设计,并进行调试、测试,结果表明,测试准确,结构简单,稳定性强。According to the required functions realized by the tester, the single-chip microcomputer is used to d ...

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单片机酒精浓度测试仪

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