搜索结果
找到约 50 项符合
constraints 的查询结果
按分类筛选
- 全部分类
- 其他书籍 (7)
- 技术资料 (6)
- 书籍 (5)
- 可编程逻辑 (3)
- 单片机开发 (3)
- 其他 (2)
- 文章/文档 (2)
- 系统设计方案 (2)
- 笔记 (1)
- 经验 (1)
- PCB相关 (1)
- 电源技术 (1)
- 接口技术 (1)
- 通讯/手机编程 (1)
- 软件工程 (1)
- 通信网络 (1)
- allegro (1)
- 驱动编程 (1)
- 编译器/解释器 (1)
- 数学计算 (1)
- 其他数据库 (1)
- 通讯编程文档 (1)
- 嵌入式/单片机编程 (1)
- 人工智能/神经网络 (1)
- VHDL/FPGA/Verilog (1)
- matlab例程 (1)
- 行业发展研究 (1)
- 人物传记/成功经验 (1)
人工智能/神经网络 This a GA implementation using binary and real coded variables. Mixed variables can be used. Constra
This a GA implementation using binary and real coded variables. Mixed variables can be used. Constraints can also be handled. All constraints must be greater-than-equal-to type (g >= 0) and normalized (see the sample problem in prob1 in objective()).
通讯/手机编程 Analyze the performance of wireless channels in different scenarios over Rayleigh fading channels wi
Analyze the performance of wireless channels in different scenarios over Rayleigh fading channels with some constraints.
技术资料 vivado集成开发环境时序约束介绍
本文主要介绍如何在Wado设计套件中进行时序约束,原文出自 xilinx中文社区。1 Timing Constraints in Vivado-UCF to xdcVivado软件相比于sE的一大转变就是约束文件,5E软件支持的是UcF(User Constraints file,而 Vivado软件转换到了XDc(Xilinx Design Constraints)。XDC主要基于SDc(Synopsys Design Constraints)标准 ...
allegro Allegro SPB V15.2 版新增功能
15.2 已經加入了有關貫孔及銲點的Z軸延遲計算功能. 先開啟 Setup - Constraints - Electrical constraint sets 下的 DRC 選項. 點選 Electrical Constraints dialog box 下 Options 頁面 勾選 Z-Axis delay栏.
可编程逻辑 Allegro SPB V15.2 版新增功能
15.2 已經加入了有關貫孔及銲點的Z軸延遲計算功能. 先開啟 Setup - Constraints - Electrical constraint sets 下的 DRC 選項. 點選 Electrical Constraints dialog box 下 Options 頁面 勾選 Z-Axis delay栏.
VHDL/FPGA/Verilog The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated with Micron SDRAM mode
The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated
with Micron SDRAM models. The design is verified with timing constraints at
115 MHZ.
经验 VIVADO集成开发环境时序约束
本文主要介绍如何在Vivado设计套件中进行时序约束,原文出自Xilinx中文社区。
Vivado软件相比于ISE的一大转变就是约束文件,ISE软件支持的是UCF(User
Constraints File),而Vivado软件转换到了XDC(Xilinx
Design Constraints)。XDC主要基于SDC(Synopsys
Design Constraints)标准,另外集成了Xilinx的一些约束标准,可 ...
编译器/解释器 编译器设计入门 内容 n Introduction n Setting Up the Tutorial n Graphical Interface n The Alarm Clock Des
编译器设计入门
内容
n Introduction
n Setting Up the Tutorial
n Graphical Interface
n The Alarm Clock Design
n Setting Design Environment
n Setting Design Constraints
n Overview of Optimization Phases
n Analysis of Report
其他书籍 This ECMA Standard specifies the form and establishes the interpretation of programs written in the
This ECMA Standard specifies the form and establishes the interpretation of programs written in the C# programming language. It specifies
The representation of C# programs
The syntax and constraints of the C# language
The semantic rules for interpreting C# programs
The restrictions and limits im ...
系统设计方案 Multirate filters provide a practical approach to designing and implementing finite response (FIR) f
Multirate filters provide a practical approach to designing and implementing finite response (FIR) filters with narrow spectral constraints. By changing the input data rate at one or more intermediate points the filter lengths and computational rates can be greatly reduced when compared to a standar ...