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matlab例程 Written for engineering and computer science students and practicing engineers, this book provides t
Written for engineering and computer science students and practicing engineers, this book provides the fundamental applications and mathematical techniques of signal processing. Topics covered include programming in MATLAB, filters, networking, and parallel processing.
MATLAB is introduced and use ...
书籍源码 这是sun公司的程序员考试书籍（英文版的pdf） 还有模拟考试安装盘
这是sun公司的程序员考试书籍（英文版的pdf）
还有模拟考试安装盘，和视频！我将稍后发布！
READ THIS AGREEMENT CAREFULLY. IF YOU AGREE TO ALL THE TERMS AND CONDITIONS SET FORTH BELOW AND ARE WILLING TO BE LEGALLY BOUND BY THEM, PRESS THE I AGREE BUTTON TO CONTINUE WITH THE SETUP. IF YOU DO NOT AGREE TO S ...
其他书籍 This paper examines the asymptotic (large sample) performance of a family of non-data aided feedfor
This paper examines the asymptotic (large sample) performance
of a family of non-data aided feedforward (NDA FF) nonlinear
least-squares (NLS) type carrier frequency estimators for burst-mode
phase shift keying (PSK) modulations transmitted through AWGN and
flat Ricean-fading channels. The asymptoti ...
SCSI/ASPI SCSI Multimedia Commands 鈥?3 (MMC-3) T10/1363-D 5.16 READ CAPACITY Command The READ CAPACITY comm
SCSI Multimedia Commands 鈥?3 (MMC-3)
T10/1363-D
5.16 READ CAPACITY Command
The READ CAPACITY command (Table 144) provides a means for the Initiator to request information
regarding the capacity of the Logical Unit. This command shall not report the correct capacity of the
recorded data for CD-R, CD ...
电子书籍 很全的中断手册。 INT 00 - CPU-generated - DIVIDE ERROR INT 01 - CPU-generated - SINGLE STEP (80386+) - DEB
很全的中断手册。
INT 00 - CPU-generated - DIVIDE ERROR
INT 01 - CPU-generated - SINGLE STEP (80386+) - DEBUGGING EXCEPTIONS
INT 02 - external hardware - NON-MASKABLE INTERRUPT
INT 03 - CPU-generated - BREAKPOINT
INT 04 - CPU-generated - INTO DETECTED OVERFLOW
INT 05 - PRINT SCREEN CPU-generated (801 ...
VHDL/FPGA/Verilog 用FPGA实现了RS232异步串行通信
用FPGA实现了RS232异步串行通信，所用语言是VHDL，另外本人还有Verilog的欢迎交流学习，根据RS232 异步串行通信来的帧格式，在FPGA发送模块中采用的每一帧格式为：1位开始位+8位数据位+1位奇校验位+1位停止位，波特率为2400。由设置的波特率可以算出分频系数，具体算法为分频系数X=CLK/(BOUND*2)。 ...
其他书籍 輕易學好C++編程技巧 - 進楷 (香港科技大學筆記 19課) 內容包括 1) base C++ review, 2) Pointers and Dynamic Objects, 3) R
輕易學好C++編程技巧 - 進楷 (香港科技大學筆記 19課) 內容包括
1) base C++ review,
2) Pointers and Dynamic Objects,
3) Recursion,Linked Lists,
4) Stacks and Queues,
5) Algorithm Analysis,
6) Insertion Sort and Mergesort,
7) Quicksort,
8) Heaps and Heapsort,
9) Lower Bound of Sorting and Radix Sort,
...
技术资料 Cadence-Allegro元件封装制作流程.
一个元件封装的制作过程如下图所示。简单来说，首先用户需要制作自己的焊盘库Pads，包括普通焊盘形状Shape Symbol和花焊盘形状Flash Symbol；然后根据元件的引脚Pins选择合适的焊盘；接着选择合适的位置放置焊盘，再放置封装各层的外形（如Assembly_Top、silkscreen Top、Place Bound Top等），添加各层的标示符Labels，还 ...
matlab例程 物流分析工具包。Facility location: Continuous minisum facility location, alternate location-allocation (ALA)
物流分析工具包。Facility location: Continuous minisum facility location, alternate location-allocation (ALA) procedure, discrete uncapacitated facility location
Vehicle routing: VRP, VRP with time windows, traveling salesman problem (TSP)
Networks: Shortest path, min cost network flow, minimum spa ...