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VHDL/FPGA/Verilog RS_latch using vhdl, When using static gates as building blocks, the most fundamental latch is the
RS_latch using vhdl,
When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR (Not OR) logic gates. The stored bit is present on the output marked Q.
Normally, in stor ...
汇编语言 This program implements a PIC-based fuzzy inference engine for the Fudge fuzzy development system
This program implements a PIC-based fuzzy inference engine for the Fudge fuzzy development system from Motorola.
It works by taking the output from Fudge for the 68HC11 processor, and converting it to a MPASM compatible assembler file using the convert
batch file.
This file can then be incorp ...
书籍源码 -- Hamming Decoder -- This Hamming decoder accepts an 8-bit Hamming code (produced by the encoder a
-- Hamming Decoder
-- This Hamming decoder accepts an 8-bit Hamming code (produced by the encoder above) and performs single error correction and double error detection.
-- download from: www.pld.com.cn & www.fpga.com.cn
LIBRARY ieee
USE ieee.std_logic_1164.ALL
ENTITY hamdec IS
PORT(hamin : ...
单片机开发 This example program shows how to configure and use the A/D Converter of the following microcontroll
This example program shows how to configure and use the A/D Converter of the following microcontroller:
STMicroelectronics ST10F166
After configuring the A/D, the program reads the A/D result and outputs the converted value using the serial port.
To run this program...
Build the project (Project ...
VHDL/FPGA/Verilog vhdl编写
vhdl编写，8b—10b 编解码器设计
Encoder:
8b/10b Encoder (file: 8b10b_enc.vhd)
Synchronous clocked inputs (latched on each clock rising edge)
8-bit parallel unencoded data input
KI input selects data or control encoding
Asynchronous active high reset initializes all logic
Encoded data output
...
技术资料 ICN6202规格书V10
ICN6201/02 is a bridge chip which receives MIPI® DSI inputs and sends LVDS outputs.
MIPI® DSI supports up to 4 lanes and each lane operates at 1Gbps maximum; the totally maximum input
bandwidth is 4Gbps; and the MIPI defined ULPS(ultra-low-power state) is also supported. ICN6201 decodes
MIPI® ...
单片机编程 PCF8578 LCD图形点阵液晶驱动器芯片简介及封装库
The PCF8578 is a low power CMOS1 LCD row and column driver, designed to drive dotmatrix graphic displays at multiplex rates of 1:8, 1:16, 1:24 or 1:32. The device has40 outputs, of which 24 are programmable and configurable for the following ratios ofrows/columns: 32¤8, 24¤16, 16¤24 or 8¤32. The ...
单片机编程 PCF2116系列LCD驱动器芯片简介及封装库
1 FEATURES· Single chip LCD controller/driver· 1 or 2-line display of up to 24 characters per line, or2 or 4 lines of up to 12 characters per line· 5 ′ 7 character format plus cursor; 5 ′ 8 for kana(Japanese syllabary) and user defined symbols· On-chip:– generation of LCD supply voltage (exte ...
单片机编程 SN65LBC170,SN75LBC170,pdf(TRIP
The SN65LBC170 and SN75LBC170 aremonolithic integrated circuits designed forbidirectional data communication on multipointbus-transmission lines. Potential applicationsinclude serial or parallel data transmission, cabledperipheral buses with twin axial, ribbon, ortwisted-pair cabling. These devices ...
技术资料 SiI9135芯片手册
Introduction The Sil9135/Sil9135A HDMI Receiver with Enhanced Audio and Deep Color Outputs is a second-generation dual-input High Definition Multimedia Interface(HDMI)receiver. It is software-compatible with the Sil9133receiver, but adds audio support for DTS-HD and Dolby TrueHD. Digital televisions ...