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VHDL/FPGA/Verilog This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone.
This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently supports single-cycle as well as burst transfer operations. The core has been tested in a master-PIF slave-WB configuration.
资料/手册 74LS73.pdf
英文描述： Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
中文描述： 双下降沿触发主从JK触发器明确和互补输出
技术资料 74LS73.pdf
英文描述： Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
中文描述： 双下降沿触发主从JK触发器明确和互补输出
书籍 Artificial+Intelligence+for+Marketing
Forewords to books can play a variety of roles. One is to describe in
more general terms what the book is about. That’s not really neces-
sary, since Jim Sterne is a master at communicating complex topics in
relatively simple terms.
VHDL/FPGA/Verilog 有关SPI的vhdl实现。包括SPI官方协议
有关SPI的vhdl实现。包括SPI官方协议，几篇开发时用到的论文，附加了中文注释的SPI IPcore，还有一个经过简化的master mode的SPI实现的vhdl代码
单片机开发 This program accesses a SPI EEPROM using polled mode access. The F12x MCU is configured in 4-wire Si
This program accesses a SPI EEPROM using polled mode access. The F12x MCU is configured in 4-wire Single Master Mode, and the EEPROM is the only slave device connected to the SPI bus. The read/write operations are tailored to access a Microchip 4 kB EEPROM
其他 Avalon Interface Specification,The Avalon interface specification is designed to accommodate periphe
Avalon Interface Specification,The Avalon interface specification is designed to accommodate peripheral development for the system-on-a-programmable-chip (SOPC) environment. The specification provides peripheral designers with a basis for describing the address-based read/write interface found on ma ...
人工智能/神经网络 关于人工免疫系统
关于人工免疫系统，克隆选择，免疫记忆的最新文献。并行人工免疫系统的塔式主从模型(Towerlike Master-Slave Model,TMSM),和基于TMSM的并行免疫记忆克隆选择算法
单片机编程 8-bit I2C-bus and SMBus IO port with reset
The PCA9557 is a silicon CMOS circuit which provides parallel input/output expansion for
SMBus and I2C-bus applications. The PCA9557 consists of an 8-bit input port register,
8-bit output port register, and an I2C-bus/SMBus interface. It has low current consumption
and a high-impedance open-dra ...