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找到约 668 项符合 Integer-only 的查询结果

无线通信 Rf And Microwave Power Amplifier Design(2005)

The main objective of this book is to present all the relevant informationrequired for RF and micro-wave power amplifier design includingwell-known and novel theoretical approaches and practical design techniquesas well as to suggest optimum design approaches effectively combininganalytical calcul ...
https://www.eeworm.com/dl/510/36010.html
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无线通信 CF卡技术资料

The information in this specification is subject to change without notice.Use of this specification for product design requires an executed license agreement from the CompactFlashAssociation.The CompactFlash Association shall not be liable for technical or editorial errors or omissions contained her ...
https://www.eeworm.com/dl/510/36525.html
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开发工具 PCB设计软件ExpressPCB 下载

ExpressPCB 是一款免费的PCB设计软件,简单实使。可以画双层板。 Our Free PCB software is a snap to learn and use. For the first time, designing circuit boards is simple for the beginner and efficient for the professional.   Our board manufacturing service makes top quality two and four lay ...
https://www.eeworm.com/dl/550/37582.html
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PCB相关 PCB设计软件ExpressPCB 下载

ExpressPCB 是一款免费的PCB设计软件,简单实使。可以画双层板。 Our Free PCB software is a snap to learn and use. For the first time, designing circuit boards is simple for the beginner and efficient for the professional.   Our board manufacturing service makes top quality two and four lay ...
https://www.eeworm.com/dl/501/38063.html
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可编程逻辑 HDL的可综合设计简介

本文简单探讨了verilog HDL设计中的可综合性问题,适合HDL初学者阅读     用组合逻辑实现的电路和用时序逻辑实现的   电路要分配到不同的进程中。   不要使用枚举类型的属性。   Integer应加范围限制。    通常的可综合代码应该是同步设计。   避免门级描述,除非在关键路径中。 ...
https://www.eeworm.com/dl/kbcluoji/40140.html
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可编程逻辑 Design Safe Verilog State Machine(Synplicity)

  One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability ana ...
https://www.eeworm.com/dl/kbcluoji/40146.html
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可编程逻辑 UART 4 UART参考设计,Xilinx提供VHDL代码

UART 4 UART参考设计,Xilinx提供VHDL代码 uart_vhdl This zip file contains the following folders:  \vhdl_source  -- Source VHDL files:      uart.vhd  - top level file      txmit.vhd - transmit portion of uart  &nb ...
https://www.eeworm.com/dl/kbcluoji/40395.html
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可编程逻辑 各种功能的计数器实例(VHDL源代码)

各种功能的计数器实例(VHDL源代码):ENTITY counters IS  PORT  (   d  : IN  INTEGER RANGE 0 TO 255;   clk  : IN BIT;   clear : IN BIT;   ld  : IN BIT;   enable : IN BI ...
https://www.eeworm.com/dl/kbcluoji/40397.html
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测试测量 低噪声电压基准的噪声测量

  Frequently, voltage reference stability and noise defi nemeasurement limits in instrumentation systems. In particular,reference noise often sets stable resolution limits.Reference voltages have decreased with the continuingdrop in system power supply voltages, making referencenoise increa ...
https://www.eeworm.com/dl/544/41895.html
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接口技术 基于单片机的USB主从机的设计与实现

随着总线和接口技术的发展,在工业场合如何更加可靠、快速、便捷地进行数据传输成为该领域通信的研究重点之一。而USB技术以其高速、可靠、通用性强等一系列特点在过去的十多年时间里发展迅猛,而USB OTG技术的诞生,使得两USB设备在没有PC参与的情况下进行数据传输成为可能。本文通过搭建以16位微处理器MSP430F149为核心控 ...
https://www.eeworm.com/dl/511/42425.html
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