搜索：FIFO - 虫虫下载站

This paper will discuss the design of an asynchronous FIFO,Asynchronous FIFOs are widely used in the computer networking industry to receive data at a particular frequency and transmit them at another frequency. An asynchronous FIFO has two different clocks: one for read and one for write.

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操作系统开发  非常好的关于fifo的中文资料

非常好的关于fifo的中文资料，供大家分享

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系统设计方案  Simulation and Synthesis Techniques for Asynchronous FIFO Design with Asynchronous Pointer Comparis

Simulation and Synthesis Techniques for Asynchronous FIFO Design with Asynchronous Pointer Comparisons

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Asynchronous Simulation Techniques Synthesis

操作系统开发  A badic controller for the UART. It incorporates a -- transmit and receive FIFO (fr

A badic controller for the UART. It incorporates a -- transmit and receive FIFO (from Max+Plus II s MegaWizard -- plug-in manager). Note that no checking is done to see -- whether the FIFOs are overflowing or not. This strictly -- handle ...

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技术资料  基于FPGA的异步FIFO的研究和设计

基于FPGA的异步FIFO的研究和设计这是一份非常不错的资料，欢迎下载，希望对您有帮助！

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VHDL/FPGA/Verilog FIFO和计数器以及时钟控制

VHDL/FPGA/Verilog fifo(8):using ip-code and rd wd interface

VHDL/FPGA/Verilog 512×8bid的FIFO 含工程文件

其他嵌入式/单片机内容  UART realization for at89c5131 with FIFO and interrupts.

通讯编程文档  This paper will discuss the design of an asynchronous FIFO,Asynchronous FIFOs are widely used in the

操作系统开发  非常好的关于fifo的中文资料

系统设计方案  Simulation and Synthesis Techniques for Asynchronous FIFO Design with Asynchronous Pointer Comparis

操作系统开发  A badic controller for the UART. It incorporates a -- transmit and receive FIFO (fr

技术资料  基于FPGA的异步FIFO的研究和设计

技术资料  树莓派驱动ov7670 带fifo版