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技术资料 ds1302.ini

资料->【B】电子技术->【B2】电路设计->【2】电路仿真->【Proteus】(电路分析实物仿真)->Proteus+仿真实例 23.4M->Proteus AVR应用实例->ds1302_lcd_8bit->settings->ds1302.ini
https://www.eeworm.com/dl/959821.html
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技术资料 test1_a90.aps

资料->【B】电子技术->【B2】电路设计->【2】电路仿真->【Proteus】(电路分析实物仿真)->Proteus+仿真实例 23.4M->Proteus AVR应用实例->4bit_lcd->Debug->Exe->test1_a90.aps
https://www.eeworm.com/dl/962425.html
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技术资料 AN2945

STM8S和STM32™微控制器:一个轻松跨越隔阂的8位/32位产品平台 (STM8S and STM32™ MCUs: a consistent 8/32-bit product line for painless migration)
https://www.eeworm.com/dl/968521.html
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技术资料 M3-FATFS

这个是context-M3的MicroSD卡的文件系统FATFS程序,在文件里写入内容,然后通过串口将这些内容打印在计算机的超级终端上,采用SDIOde4bit+DMA模式
https://www.eeworm.com/dl/1005817.html
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单片机编程 SDRAM的原理和时序

SDRAM的原理和时序 SDRAM内存模组与基本结构 我们平时看到的SDRAM都是以模组形式出现,为什么要做成这种形式呢?这首先要接触到两个概念:物理Bank与芯片位宽。1、 物理Bank 传统内存系统为了保证CPU的正常工作,必须一次传输完CPU在一个传输周期内所需要的数据。而CPU在一个传输周期能接受的数 据容量就是CPU数据总线的位 ...
https://www.eeworm.com/dl/502/30608.html
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存储器技术 ADXL345-1.zip

重力传感器芯片ADXL345的驱动代码程序。ADXL345是ADI首颗加入数码输出的高重力加速度的侦测器.最高可支持到±16g,ADC可为10bit~13bit灵敏度可维持在4mg/LSB.为了方便使用ADXL345支持I2C/SPI及中断输出,可有效减轻MCU的负荷. 3mm x 5mm小型化包装非常适合用于可携式产品. ...
https://www.eeworm.com/dl/525/8383.html
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单片机编程 at89c52 pdf

The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s high-density nonvolatile memory technology and iscompatible with the industry-standard 80C51 and 80C52 instruction ...
https://www.eeworm.com/dl/502/31676.html
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电子书籍 Features &#8226 Compatible with MCS-51&reg Products &#8226 8K Bytes of In-System Programmable (ISP

Features &#8226 Compatible with MCS-51&reg Products &#8226 8K Bytes of In-System Programmable (ISP) Flash Memory – Endurance: 1000 Write/Erase Cycles &#8226 4.0V to 5.5V Operating Range &#8226 Fully Static Operation: 0 Hz to 33 MHz &#8226 Three-level Program Memory Lock &#8226 256 x 8-bit Internal ...
https://www.eeworm.com/dl/cadence/ebook/168871.html
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VHDL/FPGA/Verilog DDR SDRAM控制器的VHDL源代码

DDR SDRAM控制器的VHDL源代码,含详细设计文档。 The DDR, DCM, and SelectI/O&#8482 features in the Virtex&#8482 -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock Manager (DCM) provides the required Delay Locked Loop (DLL), Dig ...
https://www.eeworm.com/dl/663/379154.html
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汇编语言 This program implements a PIC-based fuzzy inference engine for the Fudge fuzzy development system

This program implements a PIC-based fuzzy inference engine for the Fudge fuzzy development system from Motorola. It works by taking the output from Fudge for the 68HC11 processor, and converting it to a MPASM compatible assembler file using the convert batch file. This file can then be incorp ...
https://www.eeworm.com/dl/644/449856.html
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