adc_seg8_display.fit.rpt

来自「VHDLADC数码管动态扫描.rar」· RPT 代码 · 共 485 行 · 第 1/5 页

+--------------+-------+------------------------+
Note: User assignments will override these defaults. The user specified values are listed in the Output Pins and Bidir Pins tables.


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Resource Utilization by Entity                                                                                                                                                                                                                                  ;
+----------------------------------------------+------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; Compilation Hierarchy Node                   ; Macrocells ; Pins ; Full Hierarchy Name                                                                                                                                                                  ; Library Name ;
+----------------------------------------------+------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; |ADC_SEG8_DISPLAY                            ; 70         ; 31   ; |ADC_SEG8_DISPLAY                                                                                                                                                                    ; work         ;
;    |ADCINT:inst3|                            ; 14         ; 0    ; |ADC_SEG8_DISPLAY|ADCINT:inst3                                                                                                                                                       ; work         ;
;    |SEG8_DISPLAY:inst|                       ; 37         ; 0    ; |ADC_SEG8_DISPLAY|SEG8_DISPLAY:inst                                                                                                                                                  ; work         ;
;    |TWO_TO_BCD:inst12|                       ; 18         ; 0    ; |ADC_SEG8_DISPLAY|TWO_TO_BCD:inst12                                                                                                                                                  ; work         ;
;       |DIVI:inst1|                           ; 18         ; 0    ; |ADC_SEG8_DISPLAY|TWO_TO_BCD:inst12|DIVI:inst1                                                                                                                                       ; work         ;
;          |lpm_divide:lpm_divide_component|   ; 18         ; 0    ; |ADC_SEG8_DISPLAY|TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component                                                                                                       ; work         ;
;             |lpm_divide_pgp:auto_generated|  ; 18         ; 0    ; |ADC_SEG8_DISPLAY|TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component|lpm_divide_pgp:auto_generated                                                                         ; work         ;
;                |sign_div_unsign_jkh:divider| ; 18         ; 0    ; |ADC_SEG8_DISPLAY|TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component|lpm_divide_pgp:auto_generated|sign_div_unsign_jkh:divider                                             ; work         ;
;                   |alt_u_div_5le:divider|    ; 18         ; 0    ; |ADC_SEG8_DISPLAY|TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component|lpm_divide_pgp:auto_generated|sign_div_unsign_jkh:divider|alt_u_div_5le:divider                       ; work         ;
;                      |add_sub_q9c:add_sub_4| ; 1          ; 0    ; |ADC_SEG8_DISPLAY|TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component|lpm_divide_pgp:auto_generated|sign_div_unsign_jkh:divider|alt_u_div_5le:divider|add_sub_q9c:add_sub_4 ; work         ;
;                      |add_sub_r9c:add_sub_5| ; 2          ; 0    ; |ADC_SEG8_DISPLAY|TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component|lpm_divide_pgp:auto_generated|sign_div_unsign_jkh:divider|alt_u_div_5le:divider|add_sub_r9c:add_sub_5 ; work         ;
;                      |add_sub_s9c:add_sub_6| ; 3          ; 0    ; |ADC_SEG8_DISPLAY|TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component|lpm_divide_pgp:auto_generated|sign_div_unsign_jkh:divider|alt_u_div_5le:divider|add_sub_s9c:add_sub_6 ; work         ;
;                      |add_sub_t9c:add_sub_7| ; 3          ; 0    ; |ADC_SEG8_DISPLAY|TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component|lpm_divide_pgp:auto_generated|sign_div_unsign_jkh:divider|alt_u_div_5le:divider|add_sub_t9c:add_sub_7 ; work         ;
+----------------------------------------------+------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+


+------------------------------------------------------------------------------------------------------------------------+
; Control Signals                                                                                                        ;
+----------------------------------------+----------+---------+-------+--------+----------------------+------------------+
; Name                                   ; Location ; Fan-Out ; Usage ; Global ; Global Resource Used ; Global Line Name ;
+----------------------------------------+----------+---------+-------+--------+----------------------+------------------+
; ADCINT:inst3|current_state.state_bit_2 ; LC29     ; 11      ; Clock ; no     ; --                   ; --               ;
; CLK                                    ; PIN_89   ; 5       ; Clock ; yes    ; On                   ; --               ;
+----------------------------------------+----------+---------+-------+--------+----------------------+------------------+


+---------------------------------------------------------------------+
; Global & Other Fast Signals                                         ;
+------+----------+---------+----------------------+------------------+
; Name ; Location ; Fan-Out ; Global Resource Used ; Global Line Name ;
+------+----------+---------+----------------------+------------------+
; CLK  ; PIN_89   ; 5       ; On                   ; --               ;
+------+----------+---------+----------------------+------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Non-Global High Fan-Out Signals                                                                                                                                                                   ;
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+
; Name                                                                                                                                                                                    ; Fan-Out ;
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+
; ADCINT:inst3|REGL[7]                                                                                                                                                                    ; 37      ;
; SEG8_DISPLAY:inst|CNT[0]                                                                                                                                                                ; 36      ;
; ADCINT:inst3|REGL[6]                                                                                                                                                                    ; 35      ;
; ADCINT:inst3|REGL[4]                                                                                                                                                                    ; 34      ;
; ADCINT:inst3|REGL[5]                                                                                                                                                                    ; 33      ;
; ADCINT:inst3|REGL[3]                                                                                                                                                                    ; 32      ;
; SEG8_DISPLAY:inst|CNT[1]                                                                                                                                                                ; 28      ;
; ADCINT:inst3|REGL[1]                                                                                                                                                                    ; 26      ;
; ADCINT:inst3|REGL[2]                                                                                                                                                                    ; 26      ;
; TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component|lpm_divide_pgp:auto_generated|sign_div_unsign_jkh:divider|alt_u_div_5le:divider|StageOut[50]~1453                          ; 25      ;
; TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component|lpm_divide_pgp:auto_generated|sign_div_unsign_jkh:divider|alt_u_div_5le:divider|StageOut[49]~1446                          ; 25      ;
; TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component|lpm_divide_pgp:auto_generated|sign_div_unsign_jkh:divider|alt_u_div_5le:divider|StageOut[51]~1465                          ; 24      ;
; ADCINT:inst3|REGL[0]                                                                                                                                                                    ; 17      ;
; TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component|lpm_divide_pgp:auto_generated|sign_div_unsign_jkh:divider|alt_u_div_5le:divider|add_sub_t9c:add_sub_7|add_sub_cella[2]~129 ; 15      ;
; ADCINT:inst3|current_state.state_bit_2                                                                                                                                                  ; 11      ;
; TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component|lpm_divide_pgp:auto_generated|sign_div_unsign_jkh:divider|alt_u_div_5le:divider|add_sub_r9c:add_sub_5|add_sub_cella[4]~392 ; 10      ;
; TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component|lpm_divide_pgp:auto_generated|sign_div_unsign_jkh:divider|alt_u_div_5le:divider|add_sub_s9c:add_sub_6|add_sub_cella[4]~650 ; 9       ;
; TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component|lpm_divide_pgp:auto_generated|sign_div_unsign_jkh:divider|alt_u_div_5le:divider|add_sub_q9c:add_sub_4|_~68                 ; 9       ;
; ADCINT:inst3|current_state.state_bit_0                                                                                                                                                  ; 6       ;
; ADCINT:inst3|current_state.state_bit_1                                                                                                                                                  ; 5       ;
; SEG8_DISPLAY:inst|Mux7~137                                                                                                                                                              ; 3       ;
; SEG8_DISPLAY:inst|Mux24~100                                                                                                                                                             ; 3       ;
; TWO_TO_BCD:inst12|DIVI:inst1|lpm_divide:lpm_divide_component|lpm_divide_pgp:auto_generated|sign_div_unsign_jkh:divider|alt_u_div_5le:divider|add_sub_t9c:add_sub_7|add_sub_cella[2]~124 ; 2       ;
; SEG8_DISPLAY:inst|Mux28~50                                                                                                                                                              ; 1       ;
; SEG8_DISPLAY:inst|Mux28~49                                                                                                                                                              ; 1       ;
; SEG8_DISPLAY:inst|Mux23~324                                                                                                                                                             ; 1       ;
; ADC_D[0]                                                                                                                                                                                ; 1       ;
; ADC_D[1]                                                                                                                                                                                ; 1       ;
; ADC_D[2]                                                                                                                                                                                ; 1       ;
; ADC_D[3]                                                                                                                                                                                ; 1       ;
; ADC_D[4]                                                                                                                                                                                ; 1       ;
; ADC_D[5]                                                                                                                                                                                ; 1       ;
; ADC_D[6]                                                                                                                                                                                ; 1       ;
; ADC_D[7]                                                                                                                                                                                ; 1       ;
; EOC                                                                                                                                                                                     ; 1       ;
; SEG8_DISPLAY:inst|Mux7~131sexp5                                                                                                                                                         ; 1       ;
; SEG8_DISPLAY:inst|Mux7~131sexp4                                                                                                                                                         ; 1       ;
; SEG8_DISPLAY:inst|Mux7~131sexp3                                                                                                                                                         ; 1       ;
; SEG8_DISPLAY:inst|Mux7~131sexp2                                                                                                                                                         ; 1       ;
; SEG8_DISPLAY:inst|Mux7~131sexp1                                                                                                                                                         ; 1       ;
; SEG8_DISPLAY:inst|Mux30~39sexp                                                                                                                                                          ; 1       ;
; ~GND~0                                                                                                                                                                                  ; 1       ;
; SEG8_DISPLAY:inst|Mux26~272                                                                                                                                                             ; 1       ;
; SEG8_DISPLAY:inst|Mux26~266                                                                                                                                                             ; 1       ;
; SEG8_DISPLAY:inst|Mux26~264                                                                                                                                                             ; 1       ;
; SEG8_DISPLAY:inst|Mux25~143                                                                                                                                                             ; 1       ;
; SEG8_DISPLAY:inst|Mux25~139                                                                                                                                                             ; 1       ;
; SEG8_DISPLAY:inst|Mux7~138                                                                                                                                                              ; 1       ;