fpgawrite.fit.rpt

很多仪器都输出同步时钟

; Placement Effort Multiplier                        ; 1.0                            ; 1.0                            ;
; Router Effort Multiplier                           ; 1.0                            ; 1.0                            ;
; Optimize Hold Timing                               ; IO Paths and Minimum TPD Paths ; IO Paths and Minimum TPD Paths ;
; Optimize Fast-Corner Timing                        ; Off                            ; Off                            ;
; Optimize Timing                                    ; Normal compilation             ; Normal compilation             ;
; Optimize IOC Register Placement for Timing         ; On                             ; On                             ;
; Limit to One Fitting Attempt                       ; Off                            ; Off                            ;
; Final Placement Optimizations                      ; Automatically                  ; Automatically                  ;
; Fitter Initial Placement Seed                      ; 1                              ; 1                              ;
; Slow Slew Rate                                     ; Off                            ; Off                            ;
; PCI I/O                                            ; Off                            ; Off                            ;
; Weak Pull-Up Resistor                              ; Off                            ; Off                            ;
; Enable Bus-Hold Circuitry                          ; Off                            ; Off                            ;
; Auto Global Memory Control Signals                 ; Off                            ; Off                            ;
; Auto Packed Registers -- Cyclone                   ; Auto                           ; Auto                           ;
; Auto Delay Chains                                  ; On                             ; On                             ;
; Auto Merge PLLs                                    ; On                             ; On                             ;
; Perform Physical Synthesis for Combinational Logic ; Off                            ; Off                            ;
; Perform Register Duplication                       ; Off                            ; Off                            ;
; Perform Register Retiming                          ; Off                            ; Off                            ;
; Fitter Effort                                      ; Auto Fit                       ; Auto Fit                       ;
; Physical Synthesis Effort Level                    ; Normal                         ; Normal                         ;
; Logic Cell Insertion - Logic Duplication           ; Auto                           ; Auto                           ;
; Auto Register Duplication                          ; Off                            ; Off                            ;
; Auto Global Clock                                  ; On                             ; On                             ;
; Auto Global Register Control Signals               ; On                             ; On                             ;
+----------------------------------------------------+--------------------------------+--------------------------------+


+-------------------------------------------------------------------------+
; Fitter Device Options                                                   ;
+----------------------------------------------+--------------------------+
; Option                                       ; Setting                  ;
+----------------------------------------------+--------------------------+
; Enable user-supplied start-up clock (CLKUSR) ; Off                      ;
; Enable device-wide reset (DEV_CLRn)          ; Off                      ;
; Enable device-wide output enable (DEV_OE)    ; Off                      ;
; Enable INIT_DONE output                      ; Off                      ;
; Configuration scheme                         ; Active Serial            ;
; Error detection CRC                          ; Off                      ;
; Reserve all unused pins                      ; As output driving ground ;
; Base pin-out file on sameframe device        ; Off                      ;
+----------------------------------------------+--------------------------+


+------------------+
; Fitter Equations ;
+------------------+
The equations can be found in E:/gytask/fpgawrite1/fpgawrite.fit.eqn.


+--------------+
; Pin-Out File ;
+--------------+
The pin-out file can be found in E:/gytask/fpgawrite1/fpgawrite.pin.


+------------------------------------------------------------------+
; Fitter Resource Usage Summary                                    ;
+---------------------------------------------+--------------------+
; Resource                                    ; Usage              ;
+---------------------------------------------+--------------------+
; Total logic elements                        ; 80 / 5,980 ( 1 % ) ;
;     -- Combinational with no register       ; 0                  ;
;     -- Register only                        ; 80                 ;
;     -- Combinational with a register        ; 0                  ;
;                                             ;                    ;
; Logic element usage by number of LUT inputs ;                    ;
;     -- 4 input functions                    ; 0                  ;
;     -- 3 input functions                    ; 0                  ;
;     -- 2 input functions                    ; 0                  ;
;     -- 1 input functions                    ; 31                 ;
;     -- 0 input functions                    ; 49                 ;
;                                             ;                    ;
; Logic elements by mode                      ;                    ;
;     -- normal mode                          ; 80                 ;
;     -- arithmetic mode                      ; 0                  ;
;     -- qfbk mode                            ; 0                  ;
;     -- register cascade mode                ; 0                  ;
;     -- synchronous clear/load mode          ; 49                 ;