fspi.map.rpt

很多仪器都输出同步时钟

Analysis & Synthesis report for Fspi
Sun Jun 25 10:48:44 2006
Version 5.0 Build 148 04/26/2005 SJ Full Version


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; Table of Contents ;
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  1. Legal Notice
  2. Analysis & Synthesis Summary
  3. Analysis & Synthesis Settings
  4. Analysis & Synthesis Source Files Read
  5. Analysis & Synthesis Resource Usage Summary
  6. Analysis & Synthesis Resource Utilization by Entity
  7. Analysis & Synthesis RAM Summary
  8. State Machine - |spi|fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|scfifo:output_channel|a_fffifo:subfifo|a_fefifo:fifo_state|sm_emptyfull
  9. User-Specified and Inferred Latches
 10. General Register Statistics
 11. Inverted Register Statistics
 12. Multiplexer Restructuring Statistics (Restructuring Performed)
 13. Parameter Settings for User Entity Instance: fifo0:inst1|dcfifo:dcfifo_component
 14. Parameter Settings for User Entity Instance: fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|scfifo:output_channel
 15. Parameter Settings for User Entity Instance: pll0:inst12|altpll:altpll_component
 16. Parameter Settings for User Entity Instance: lpm_compare1:inst19|lpm_compare:lpm_compare_component
 17. Parameter Settings for User Entity Instance: lpm_counter2:inst18|lpm_counter:lpm_counter_component
 18. Parameter Settings for User Entity Instance: lpm_counter1:inst17|lpm_counter:lpm_counter_component
 19. Parameter Settings for User Entity Instance: counter8:inst6|lpm_counter:lpm_counter_component
 20. Parameter Settings for User Entity Instance: lpm_compare0:inst3|lpm_compare:lpm_compare_component
 21. Parameter Settings for User Entity Instance: lpm_counter0:inst4|lpm_counter:lpm_counter_component
 22. Parameter Settings for Inferred Entity Instance: sld_signaltap:auto_signaltap_0
 23. Parameter Settings for Inferred Entity Instance: sld_hub:sld_hub_inst
 24. dcfifo Parameter Settings by Entity Instance
 25. scfifo Parameter Settings by Entity Instance
 26. SignalTap II Logic Analyzer Settings
 27. Analysis & Synthesis Equations
 28. Analysis & Synthesis Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2005 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic       
functions, and any output files any of the foregoing           
(including device programming or simulation files), and any    
associated documentation or information are expressly subject  
to the terms and conditions of the Altera Program License      
Subscription Agreement, Altera MegaCore Function License       
Agreement, or other applicable license agreement, including,   
without limitation, that your use is for the sole purpose of   
programming logic devices manufactured by Altera and sold by   
Altera or its authorized distributors.  Please refer to the    
applicable agreement for further details.



+------------------------------------------------------------------------+
; Analysis & Synthesis Summary                                           ;
+-----------------------------+------------------------------------------+
; Analysis & Synthesis Status ; Successful - Sun Jun 25 10:48:44 2006    ;
; Quartus II Version          ; 5.0 Build 148 04/26/2005 SJ Full Version ;
; Revision Name               ; Fspi                                     ;
; Top-level Entity Name       ; spi                                      ;
; Family                      ; Cyclone                                  ;
; Total logic elements        ; 997                                      ;