试验8.txt

带复位和时钟使能的十进制计数器 verilo 描述

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity cnt10 is
port(clk,rest,en:in std_logic;
      b: in std_logic_vector(2 downto 0);
     led7s:out std_logic_vector(6 downto 0);
      led_selout,cout:out std_logic_vector(7 downto 0)); 
end;
architecture bhh of cnt10 is
signal cq: std_logic_vector(3 downto 0);
begin
process(clk,rest,en)
variable cqi: std_logic_vector(3 downto 0);
 begin
if rest='1' then
cqi:=(others=>'0');
elsif clk'event and clk='1' then
if en='1' then
if cqi<9  then 
cqi:=cqi+1;
else
cqi:=(others=>'0');
end if;
end if;
end if;
if cqi=9 then
cout<="01111111";
else
cout<="11111111";
end if;
cq<=cqi;
end process;
process(cq,b)
begin
case cq is
  when "0000"=>led7s<="1000000";
  when "0001"=>led7s<="1111001";
  when "0010"=>led7s<="0100100";
  when "0011"=>led7s<="0110000";
  when "0100"=>led7s<="0011001";
  when "0101"=>led7s<="0010010";
  when "0110"=>led7s<="0000010";
  when "0111"=>led7s<="1111000";
  when "1000"=>led7s<="1000000";
  when "1001"=>led7s<="0010000";
  when "1010"=>led7s<="0001000";
  when "1100"=>led7s<="1000110";
  when "1101"=>led7s<="0100001";
  when "1110"=>led7s<="0000110";
  when "1111"=>led7s<="0001110";
when others=> null;
end case;
case b is
  when "000"=>led_selout<="00000001";
  when "001"=>led_selout<="00000010";
  when "010"=>led_selout<="00000100";
  when "011"=>led_selout<="00001000";
  when "100"=>led_selout<="00010000";
  when "101"=>led_selout<="00100000";
  when "110"=>led_selout<="01000000";
  when "111"=>led_selout<="10000000";
when others=>null;
end case;
end process;
end;